1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
|
/*
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
/** @file brw_fs_validate.cpp
*
* Implements a pass that validates various invariants of the IR. The current
* pass only validates that GRF's uses are sane. More can be added later.
*/
#include "brw_fs.h"
#include "brw_cfg.h"
#define fsv_assert(assertion) \
{ \
if (!(assertion)) { \
fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", stage_abbrev); \
dump_instruction(inst, stderr); \
fprintf(stderr, "%s:%d: '%s' failed\n", __FILE__, __LINE__, #assertion); \
abort(); \
} \
}
#define fsv_assert_eq(first, second) \
{ \
unsigned f = (first); \
unsigned s = (second); \
if (f != s) { \
fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", stage_abbrev); \
dump_instruction(inst, stderr); \
fprintf(stderr, "%s:%d: A == B failed\n", __FILE__, __LINE__); \
fprintf(stderr, " A = %s = %u\n", #first, f); \
fprintf(stderr, " B = %s = %u\n", #second, s); \
abort(); \
} \
}
#define fsv_assert_ne(first, second) \
{ \
unsigned f = (first); \
unsigned s = (second); \
if (f == s) { \
fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", stage_abbrev); \
dump_instruction(inst, stderr); \
fprintf(stderr, "%s:%d: A != B failed\n", __FILE__, __LINE__); \
fprintf(stderr, " A = %s = %u\n", #first, f); \
fprintf(stderr, " B = %s = %u\n", #second, s); \
abort(); \
} \
}
#define fsv_assert_lte(first, second) \
{ \
unsigned f = (first); \
unsigned s = (second); \
if (f > s) { \
fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", stage_abbrev); \
dump_instruction(inst, stderr); \
fprintf(stderr, "%s:%d: A <= B failed\n", __FILE__, __LINE__); \
fprintf(stderr, " A = %s = %u\n", #first, f); \
fprintf(stderr, " B = %s = %u\n", #second, s); \
abort(); \
} \
}
void
fs_visitor::validate()
{
#ifndef NDEBUG
foreach_block_and_inst (block, fs_inst, inst, cfg) {
switch (inst->opcode) {
case SHADER_OPCODE_URB_WRITE_LOGICAL: {
const unsigned header_size = 1 +
unsigned(inst->src[URB_LOGICAL_SRC_PER_SLOT_OFFSETS].file != BAD_FILE) +
unsigned(inst->src[URB_LOGICAL_SRC_CHANNEL_MASK].file != BAD_FILE);
unsigned data_size = 0;
for (unsigned i = header_size, j = 0; i < inst->mlen; i++, j++) {
fsv_assert_eq(type_sz(offset(inst->src[URB_LOGICAL_SRC_DATA], bld, j).type), 4);
data_size++;
}
fsv_assert_eq(header_size + data_size, inst->mlen);
break;
}
case SHADER_OPCODE_SEND:
fsv_assert(is_uniform(inst->src[0]) && is_uniform(inst->src[1]));
break;
case BRW_OPCODE_MOV:
fsv_assert(inst->sources == 1);
break;
default:
break;
}
if (inst->is_3src(compiler)) {
const unsigned integer_sources =
brw_reg_type_is_integer(inst->src[0].type) +
brw_reg_type_is_integer(inst->src[1].type) +
brw_reg_type_is_integer(inst->src[2].type);
const unsigned float_sources =
brw_reg_type_is_floating_point(inst->src[0].type) +
brw_reg_type_is_floating_point(inst->src[1].type) +
brw_reg_type_is_floating_point(inst->src[2].type);
fsv_assert((integer_sources == 3 && float_sources == 0) ||
(integer_sources == 0 && float_sources == 3));
if (devinfo->ver >= 10) {
for (unsigned i = 0; i < 3; i++) {
if (inst->src[i].file == BRW_IMMEDIATE_VALUE)
continue;
switch (inst->src[i].vstride) {
case BRW_VERTICAL_STRIDE_0:
case BRW_VERTICAL_STRIDE_4:
case BRW_VERTICAL_STRIDE_8:
case BRW_VERTICAL_STRIDE_16:
break;
case BRW_VERTICAL_STRIDE_1:
fsv_assert_lte(12, devinfo->ver);
break;
case BRW_VERTICAL_STRIDE_2:
fsv_assert_lte(devinfo->ver, 11);
break;
default:
fsv_assert(!"invalid vstride");
break;
}
}
} else if (grf_used != 0) {
/* Only perform the pre-Gfx10 checks after register allocation has
* occured.
*
* Many passes (e.g., constant copy propagation) will genenerate
* invalid 3-source instructions with the expectation that later
* passes (e.g., combine constants) will fix them.
*/
for (unsigned i = 0; i < 3; i++) {
fsv_assert_ne(inst->src[i].file, BRW_IMMEDIATE_VALUE);
/* A stride of 1 (the usual case) or 0, with a special
* "repctrl" bit, is allowed. The repctrl bit doesn't work for
* 64-bit datatypes, so if the source type is 64-bit then only
* a stride of 1 is allowed. From the Broadwell PRM, Volume 7
* "3D Media GPGPU", page 944:
*
* This is applicable to 32b datatypes and 16b datatype. 64b
* datatypes cannot use the replicate control.
*/
fsv_assert_lte(inst->src[i].vstride, 1);
if (type_sz(inst->src[i].type) > 4)
fsv_assert_eq(inst->src[i].vstride, 1);
}
}
}
if (inst->dst.file == VGRF) {
fsv_assert_lte(inst->dst.offset / REG_SIZE + regs_written(inst),
alloc.sizes[inst->dst.nr]);
}
for (unsigned i = 0; i < inst->sources; i++) {
if (inst->src[i].file == VGRF) {
fsv_assert_lte(inst->src[i].offset / REG_SIZE + regs_read(inst, i),
alloc.sizes[inst->src[i].nr]);
}
}
}
#endif
}
|
