diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2009-03-17 16:13:10 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2009-03-17 16:16:39 -0700 |
| commit | ef72b03fb4338f98db41fc6e14307b9dbbb81a4a (patch) | |
| tree | f991faea1a82d450744be3dee0e34ff00ba2fe47 | |
| parent | cdf42e675dd1164d2ee0409fd4dd1ab2eb17607c (diff) | |
| download | nasm-ef72b03fb4338f98db41fc6e14307b9dbbb81a4a.tar.gz | |
BR 2690688: add missing VFM instructions
The Perl script which auto-generated the VFM instructions had
incorrectly conflated the VEX.W and VEX.L bits, with the result that
only half the valid instructions were generated.
| -rw-r--r-- | insns.dat | 192 | ||||
| -rwxr-xr-x | misc/genfma.pl | 53 |
2 files changed, 197 insertions, 48 deletions
@@ -3294,146 +3294,290 @@ VPCLMULQDQ xmmreg,xmmrm,imm [r+vmi: vex.nds.128.66.0f3a 44 /r ib] AVX,SANDYBRI ;# Intel Fused Multiply-Add instructions (FMA) VFMADD132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO VFMADD132PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO +VFMADD132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADD132PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADD132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO +VFMADD132PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO VFMADD132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMADD132PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMADD312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO VFMADD312PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO +VFMADD312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADD312PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADD312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO +VFMADD312PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO VFMADD312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMADD312PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMADD213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO VFMADD213PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO +VFMADD213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMADD213PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMADD213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO +VFMADD213PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO VFMADD213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFMADD213PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFMADD123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO VFMADD123PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO +VFMADD123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMADD123PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMADD123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO +VFMADD123PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO VFMADD123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFMADD123PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFMADD231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO VFMADD231PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO +VFMADD231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMADD231PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMADD231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO +VFMADD231PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO VFMADD231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMADD231PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMADD321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO VFMADD321PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO +VFMADD321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMADD321PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMADD321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO +VFMADD321PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO VFMADD321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMADD321PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMADDSUB132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO VFMADDSUB132PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO +VFMADDSUB132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY +VFMADDSUB132PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY +VFMADDSUB132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO +VFMADDSUB132PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO VFMADDSUB132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY VFMADDSUB132PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY VFMADDSUB312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO VFMADDSUB312PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO +VFMADDSUB312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY +VFMADDSUB312PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY +VFMADDSUB312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO +VFMADDSUB312PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO VFMADDSUB312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY VFMADDSUB312PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY VFMADDSUB213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO VFMADDSUB213PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO +VFMADDSUB213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMADDSUB213PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMADDSUB213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO +VFMADDSUB213PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO VFMADDSUB213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMADDSUB213PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMADDSUB123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO VFMADDSUB123PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO +VFMADDSUB123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMADDSUB123PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMADDSUB123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO +VFMADDSUB123PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO VFMADDSUB123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMADDSUB123PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMADDSUB231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO VFMADDSUB231PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO +VFMADDSUB231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADDSUB231PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADDSUB231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO +VFMADDSUB231PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO VFMADDSUB231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMADDSUB231PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMADDSUB321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO VFMADDSUB321PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO +VFMADDSUB321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADDSUB321PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMADDSUB321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO +VFMADDSUB321PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO VFMADDSUB321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMADDSUB321PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMSUB132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO VFMSUB132PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO +VFMSUB132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMSUB132PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMSUB132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO +VFMSUB132PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO VFMSUB132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMSUB132PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMSUB312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO VFMSUB312PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO +VFMSUB312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMSUB312PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY +VFMSUB312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO +VFMSUB312PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO VFMSUB312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMSUB312PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY VFMSUB213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SO VFMSUB213PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SO +VFMSUB213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9b /r] FMA,FUTURE,SY +VFMSUB213PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9b /r] FMA,FUTURE,SY +VFMSUB213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SO +VFMSUB213PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SO VFMSUB213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9b /r] FMA,FUTURE,SY VFMSUB213PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9b /r] FMA,FUTURE,SY VFMSUB123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SO VFMSUB123PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SO +VFMSUB123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9b /r] FMA,FUTURE,SY +VFMSUB123PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9b /r] FMA,FUTURE,SY +VFMSUB123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SO +VFMSUB123PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SO VFMSUB123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9b /r] FMA,FUTURE,SY VFMSUB123PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9b /r] FMA,FUTURE,SY VFMSUB231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO VFMSUB231PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO +VFMSUB231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFMSUB231PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFMSUB231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO +VFMSUB231PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO VFMSUB231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFMSUB231PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFMSUB321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO VFMSUB321PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO +VFMSUB321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFMSUB321PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFMSUB321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO +VFMSUB321PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO VFMSUB321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFMSUB321PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFMSUBADD132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO VFMSUBADD132PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO +VFMSUBADD132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMSUBADD132PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMSUBADD132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO +VFMSUBADD132PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO VFMSUBADD132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMSUBADD132PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMSUBADD312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO VFMSUBADD312PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO +VFMSUBADD312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMSUBADD312PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY +VFMSUBADD312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO +VFMSUBADD312PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO VFMSUBADD312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMSUBADD312PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY VFMSUBADD213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO VFMSUBADD213PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO +VFMSUBADD213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMSUBADD213PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMSUBADD213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO +VFMSUBADD213PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO VFMSUBADD213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMSUBADD213PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMSUBADD123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO VFMSUBADD123PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO +VFMSUBADD123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMSUBADD123PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY +VFMSUBADD123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO +VFMSUBADD123PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO VFMSUBADD123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMSUBADD123PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY VFMSUBADD231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO VFMSUBADD231PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO +VFMSUBADD231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMSUBADD231PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMSUBADD231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO +VFMSUBADD231PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO VFMSUBADD231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFMSUBADD231PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFMSUBADD321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO VFMSUBADD321PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SO +VFMSUBADD321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMSUBADD321PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 99 /r] FMA,FUTURE,SY +VFMSUBADD321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO +VFMSUBADD321PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SO VFMSUBADD321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFMSUBADD321PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 99 /r] FMA,FUTURE,SY VFNMADD132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO VFNMADD132PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO +VFNMADD132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFNMADD132PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFNMADD132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO +VFNMADD132PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO VFNMADD132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFNMADD132PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFNMADD312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO VFNMADD312PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO +VFNMADD312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFNMADD312PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY +VFNMADD312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO +VFNMADD312PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO VFNMADD312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFNMADD312PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY VFNMADD213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SO VFNMADD213PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SO +VFNMADD213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9d /r] FMA,FUTURE,SY +VFNMADD213PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9d /r] FMA,FUTURE,SY +VFNMADD213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SO +VFNMADD213PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SO VFNMADD213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9d /r] FMA,FUTURE,SY VFNMADD213PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9d /r] FMA,FUTURE,SY VFNMADD123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SO VFNMADD123PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SO +VFNMADD123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9d /r] FMA,FUTURE,SY +VFNMADD123PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9d /r] FMA,FUTURE,SY +VFNMADD123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SO +VFNMADD123PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SO VFNMADD123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9d /r] FMA,FUTURE,SY VFNMADD123PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9d /r] FMA,FUTURE,SY VFNMADD231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO VFNMADD231PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO +VFNMADD231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMADD231PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMADD231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO +VFNMADD231PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO VFNMADD231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMADD231PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMADD321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO VFNMADD321PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO +VFNMADD321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMADD321PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMADD321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO +VFNMADD321PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO VFNMADD321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMADD321PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMSUB132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO VFNMSUB132PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO +VFNMSUB132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMSUB132PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMSUB132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO +VFNMSUB132PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO VFNMSUB132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMSUB132PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMSUB312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO VFNMSUB312PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO +VFNMSUB312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMSUB312PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY +VFNMSUB312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO +VFNMSUB312PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO VFNMSUB312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMSUB312PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY VFNMSUB213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SO VFNMSUB213PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SO +VFNMSUB213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9f /r] FMA,FUTURE,SY +VFNMSUB213PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9f /r] FMA,FUTURE,SY +VFNMSUB213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SO +VFNMSUB213PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SO VFNMSUB213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9f /r] FMA,FUTURE,SY VFNMSUB213PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9f /r] FMA,FUTURE,SY VFNMSUB123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SO VFNMSUB123PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SO +VFNMSUB123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9f /r] FMA,FUTURE,SY +VFNMSUB123PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 9f /r] FMA,FUTURE,SY +VFNMSUB123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SO +VFNMSUB123PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SO VFNMSUB123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9f /r] FMA,FUTURE,SY VFNMSUB123PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 9f /r] FMA,FUTURE,SY VFNMSUB231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SO VFNMSUB231PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SO +VFNMSUB231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a0 /r] FMA,FUTURE,SY +VFNMSUB231PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 a0 /r] FMA,FUTURE,SY +VFNMSUB231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SO +VFNMSUB231PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SO VFNMSUB231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a0 /r] FMA,FUTURE,SY VFNMSUB231PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 a0 /r] FMA,FUTURE,SY VFNMSUB321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SO VFNMSUB321PS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SO +VFNMSUB321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a0 /r] FMA,FUTURE,SY +VFNMSUB321PS ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w0 a0 /r] FMA,FUTURE,SY +VFNMSUB321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SO +VFNMSUB321PD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SO VFNMSUB321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a0 /r] FMA,FUTURE,SY VFNMSUB321PD ymmreg,ymmrm [r+vm: vex.dds.256.66.0f38.w1 a0 /r] FMA,FUTURE,SY VFMADD132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SD @@ -3460,6 +3604,30 @@ VFMADD321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE VFMADD321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD VFMADD321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ VFMADD321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ +VFMSUB132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD +VFMSUB132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD +VFMSUB132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ +VFMSUB132SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ +VFMSUB312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD +VFMSUB312SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD +VFMSUB312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ +VFMSUB312SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ +VFMSUB213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFMSUB213SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFMSUB213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFMSUB213SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFMSUB123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFMSUB123SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFMSUB123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFMSUB123SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFMSUB231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFMSUB231SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFMSUB231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ +VFMSUB231SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ +VFMSUB321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFMSUB321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFMSUB321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ +VFMSUB321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ VFNMADD132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD VFNMADD132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD VFNMADD132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ @@ -3508,30 +3676,6 @@ VFNMSUB321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTUR VFNMSUB321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD VFNMSUB321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ VFNMSUB321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ -VFMSUB132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD -VFMSUB132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD -VFMSUB132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ -VFMSUB132SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ -VFMSUB312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD -VFMSUB312SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD -VFMSUB312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ -VFMSUB312SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ -VFMSUB213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMSUB213SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMSUB213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMSUB213SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMSUB123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMSUB123SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMSUB123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMSUB123SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMSUB231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMSUB231SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMSUB231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ -VFMSUB231SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ -VFMSUB321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMSUB321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMSUB321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ -VFMSUB321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ ;# VIA (Centaur) security instructions XSTORE void \3\x0F\xA7\xC0 PENT,CYRIX diff --git a/misc/genfma.pl b/misc/genfma.pl index 09551abe..b1bb001d 100755 --- a/misc/genfma.pl +++ b/misc/genfma.pl @@ -21,22 +21,25 @@ foreach $pi ( sort(keys(%packed_insns)) ) { $xorder = substr($order,1,1).substr($order,0,1).substr($order,2,1); foreach $o ($order, $xorder) { for ($w = 0; $w < 2; $w++) { - $suf = $w ? 'pd' : 'ps'; - $mm = $w ? 'ymm' : 'xmm'; - $sx = $w ? 'SY' : 'SO'; - $ww = $w ? 256 : 128; - printf "%-15s %-31s %-47s %s\n", - "\U${pi}${o}${suf}", - "${mm}reg,${mm}reg,${mm}rm", - sprintf("[rvm:\tvex.dds.%d.66.0f38.w%d %02x /r]", - $ww, $w, $op), - "FMA,FUTURE,${sx}"; - printf "%-15s %-31s %-47s %s\n", - "\U${pi}${o}${suf}", - "${mm}reg,${mm}rm", - sprintf("[r+vm:\tvex.dds.%d.66.0f38.w%d %02x /r]", - $ww, $w, $op), - "FMA,FUTURE,${sx}"; + $suf = $w ? 'pd' : 'ps'; + for ($l = 128; $l <= 256; $l <<= 1) { + $sx = ($l == 256) ? 'SY' : 'SO'; + $mm = ($l == 256) ? 'ymm' : 'xmm'; + printf "%-15s %-31s %-8s%-39s %s\n", + "\U${pi}${o}${suf}", + "${mm}reg,${mm}reg,${mm}rm", + "[rvm:", + sprintf("vex.dds.%d.66.0f38.w%d %02x /r]", + $l, $w, $op), + "FMA,FUTURE,${sx}"; + printf "%-15s %-31s %-8s%-39s %s\n", + "\U${pi}${o}${suf}", + "${mm}reg,${mm}rm", + "[r+vm:", + sprintf("vex.dds.%d.66.0f38.w%d %02x /r]", + $l, $w, $op), + "FMA,FUTURE,${sx}"; + } } } $op++; @@ -50,20 +53,22 @@ foreach $si ( sort(keys(%scalar_insns)) ) { foreach $o ($order, $xorder) { for ($w = 0; $w < 2; $w++) { $suf = $w ? 'sd' : 'ss'; - $mm = 'xmm'; $sx = $w ? 'SQ' : 'SD'; - $ww = 128; - printf "%-15s %-31s %-47s %s\n", + $l = 128; + $mm = 'xmm'; + printf "%-15s %-31s %-8s%-39s %s\n", "\U${si}${o}${suf}", "${mm}reg,${mm}reg,${mm}rm", - sprintf("[rvm:\tvex.dds.%d.66.0f38.w%d %02x /r]", - $ww, $w, $op), + '[rvm:', + sprintf("vex.dds.%d.66.0f38.w%d %02x /r]", + $l, $w, $op), "FMA,FUTURE,${sx}"; - printf "%-15s %-31s %-47s %s\n", + printf "%-15s %-31s %-8s%-39s %s\n", "\U${si}${o}${suf}", "${mm}reg,${mm}rm", - sprintf("[r+vm:\tvex.dds.%d.66.0f38.w%d %02x /r]", - $ww, $w, $op), + '[r+vm:', + sprintf("vex.dds.%d.66.0f38.w%d %02x /r]", + $l, $w, $op), "FMA,FUTURE,${sx}"; } } |