diff options
author | H. Peter Anvin <hpa@zytor.com> | 2009-06-24 21:43:04 -0700 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2009-06-24 21:43:04 -0700 |
commit | 1d3e304546fad8dbcd26df3e7d69a3865bdaddf0 (patch) | |
tree | 4410cd357f98f7656f98d3be22241ff18c22c9bc /test/pinsr64.asm | |
parent | 9472dab6ed91507235a4ba4031566bc5c2a0df39 (diff) | |
download | nasm-1d3e304546fad8dbcd26df3e7d69a3865bdaddf0.tar.gz |
Fix the PINSR series of instructions
Clean up a number of errors in the PINSR series instructions.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'test/pinsr64.asm')
-rw-r--r-- | test/pinsr64.asm | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/test/pinsr64.asm b/test/pinsr64.asm new file mode 100644 index 00000000..19288466 --- /dev/null +++ b/test/pinsr64.asm @@ -0,0 +1,63 @@ + bits 64 + + pinsrb xmm0,eax,0 + pinsrb xmm1,sil,0 ; BROKEN +; pinsrb xmm1,bh,0 ; BROKEN + pinsrb xmm2,[rcx],0 + pinsrb xmm3,byte [rcx],0 ; BROKEN + + pinsrw xmm0,eax,0 + pinsrw xmm1,si,0 + pinsrw xmm2,[rcx],0 + pinsrw xmm3,word [rcx],0 ; BROKEN + + pinsrd xmm0,eax,0 + pinsrd xmm1,esi,0 + pinsrd xmm2,[rcx],0 ; BROKEN + pinsrd xmm3,dword [rcx],0 + + pinsrq xmm0,rax,0 + pinsrq xmm1,rsi,0 + pinsrq xmm2,[rcx],0 ; BROKEN + pinsrq xmm3,qword [rcx],0 + + vpinsrb xmm0,eax,0 + vpinsrb xmm1,sil,0 + vpinsrb xmm2,[rcx],0 + vpinsrb xmm3,byte [rcx],0 + + vpinsrw xmm0,eax,0 + vpinsrw xmm1,si,0 + vpinsrw xmm2,[rcx],0 + vpinsrw xmm3,word [rcx],0 + + vpinsrd xmm0,eax,0 + vpinsrd xmm1,esi,0 + vpinsrd xmm2,[rcx],0 + vpinsrd xmm3,dword [rcx],0 + + vpinsrq xmm0,rax,0 + vpinsrq xmm1,rsi,0 + vpinsrq xmm2,[rcx],0 + vpinsrq xmm3,qword [rcx],0 + + vpinsrb xmm4,xmm0,eax,0 + vpinsrb xmm5,xmm1,sil,0 + vpinsrb xmm6,xmm2,[rcx],0 + vpinsrb xmm7,xmm3,byte [rcx],0 + + vpinsrw xmm4,xmm0,eax,0 + vpinsrw xmm5,xmm1,si,0 + vpinsrw xmm6,xmm2,[rcx],0 + vpinsrw xmm7,xmm3,word [rcx],0 + + vpinsrd xmm4,xmm0,eax,0 + vpinsrd xmm5,xmm1,esi,0 + vpinsrd xmm6,xmm2,[rcx],0 + vpinsrd xmm7,xmm3,dword [rcx],0 + + vpinsrq xmm4,xmm0,rax,0 + vpinsrq xmm5,xmm1,rsi,0 + vpinsrq xmm6,xmm2,[rcx],0 + vpinsrq xmm7,xmm3,qword [rdx],0 +
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