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| author | Cyrill Gorcunov <gorcunov@gmail.com> | 2017-12-29 16:57:54 +0300 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2018-01-08 12:53:32 -0800 |
| commit | 581fc6899b631e344339c478d9803e8a71c9670c (patch) | |
| tree | 0d7e60ba5764a88588fa030f16c492790b5a50f5 /x86 | |
| parent | 1aebcc76e3d732f027d08e6575774dc658f6e62d (diff) | |
| download | nasm-581fc6899b631e344339c478d9803e8a71c9670c.tar.gz | |
insns.dat: Move VAES instructions to AES group
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Diffstat (limited to 'x86')
| -rw-r--r-- | x86/insns.dat | 49 |
1 files changed, 25 insertions, 24 deletions
diff --git a/x86/insns.dat b/x86/insns.dat index 8ceab041..f641382f 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -2046,6 +2046,31 @@ VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 df /r] AVX,SANDY VAESIMC xmmreg,xmmrm128 [rm: vex.128.66.0f38 db /r] AVX,SANDYBRIDGE VAESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a df /r ib] AVX,SANDYBRIDGE +;# Intel instruction extension based on pub number 319433-030 dated October 2017 + +; Intel VAES instructions +VAESENC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dc /r] VAES,FUTURE +VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dd /r] VAES,FUTURE +VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig de /r] VAES,FUTURE +VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig df /r] VAES,FUTURE + +; Intel VAES + AVX512VL instructions +VAESENC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dc /r] AVX512VL,AVX512,VAES,FUTURE +VAESENC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dc /r] AVX512VL,AVX512,VAES,FUTURE +VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dd /r] AVX512VL,AVX512,VAES,FUTURE +VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dd /r] AVX512VL,AVX512,VAES,FUTURE +VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig de /r] AVX512VL,AVX512,VAES,FUTURE +VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig de /r] AVX512VL,AVX512,VAES,FUTURE +VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig df /r] AVX512VL,AVX512,VAES,FUTURE +VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig df /r] AVX512VL,AVX512,VAES,FUTURE + +; Intel VAES + AVX512F instructions +VAESENC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dc /r] AVX512,VAES,FUTURE +VAESENCLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dd /r] AVX512,VAES,FUTURE +VAESDEC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig de /r] AVX512,VAES,FUTURE +VAESDECLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig df /r] AVX512,VAES,FUTURE + + ;# Intel AVX instructions VADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 58 /r] AVX,SANDYBRIDGE VADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 58 /r] AVX,SANDYBRIDGE @@ -5123,30 +5148,6 @@ PCOMMIT void [ 66 0f ae f8] ; AMD Zen v1 CLZERO void [ 0f 01 fc] FUTURE,AMD -;# Intel instruction extension based on pub number 319433-030 dated October 2017 - -; Intel VAES instructions -VAESENC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dc /r] VAES,FUTURE -VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dd /r] VAES,FUTURE -VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig de /r] VAES,FUTURE -VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig df /r] VAES,FUTURE - -; Intel VAES + AVX512VL instructions -VAESENC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dc /r] AVX512VL,AVX512,VAES,FUTURE -VAESENC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dc /r] AVX512VL,AVX512,VAES,FUTURE -VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dd /r] AVX512VL,AVX512,VAES,FUTURE -VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dd /r] AVX512VL,AVX512,VAES,FUTURE -VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig de /r] AVX512VL,AVX512,VAES,FUTURE -VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig de /r] AVX512VL,AVX512,VAES,FUTURE -VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig df /r] AVX512VL,AVX512,VAES,FUTURE -VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig df /r] AVX512VL,AVX512,VAES,FUTURE - -; Intel VAES + AVX512F instructions -VAESENC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dc /r] AVX512,VAES,FUTURE -VAESENCLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dd /r] AVX512,VAES,FUTURE -VAESDEC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig de /r] AVX512,VAES,FUTURE -VAESDECLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig df /r] AVX512,VAES,FUTURE - ;# Systematic names for the hinting nop instructions ; These should be last in the file HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC |