diff options
author | Michaël Zasso <targos@protonmail.com> | 2018-07-25 19:30:07 +0200 |
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committer | Michaël Zasso <targos@protonmail.com> | 2018-07-26 08:31:50 +0200 |
commit | 6a31d05340b22fc413ee83eaacd0a5565bbbe799 (patch) | |
tree | 78f9e1c2f417244842f6422f17e1816e70317100 /deps/v8/src/s390/assembler-s390.h | |
parent | 4d94bb2b1f72b6b612983a517a39c5545724a3ad (diff) | |
download | node-new-6a31d05340b22fc413ee83eaacd0a5565bbbe799.tar.gz |
deps: update V8 to 6.8.275.24
PR-URL: https://github.com/nodejs/node/pull/21079
Reviewed-By: James M Snell <jasnell@gmail.com>
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Reviewed-By: Yang Guo <yangguo@chromium.org>
Diffstat (limited to 'deps/v8/src/s390/assembler-s390.h')
-rw-r--r-- | deps/v8/src/s390/assembler-s390.h | 80 |
1 files changed, 41 insertions, 39 deletions
diff --git a/deps/v8/src/s390/assembler-s390.h b/deps/v8/src/s390/assembler-s390.h index ce3f04c996..9d9a04d34f 100644 --- a/deps/v8/src/s390/assembler-s390.h +++ b/deps/v8/src/s390/assembler-s390.h @@ -370,7 +370,7 @@ class Operand BASE_EMBEDDED { INLINE(static Operand Zero()) { return Operand(static_cast<intptr_t>(0)); } INLINE(explicit Operand(const ExternalReference& f) : rmode_(RelocInfo::EXTERNAL_REFERENCE)) { - value_.immediate = reinterpret_cast<intptr_t>(f.address()); + value_.immediate = static_cast<intptr_t>(f.address()); } explicit Operand(Handle<HeapObject> handle); INLINE(explicit Operand(Smi* value) : rmode_(RelocInfo::NONE)) { @@ -566,6 +566,10 @@ class Assembler : public AssemblerBase { inline static void deserialization_set_special_target_at( Address instruction_payload, Code* code, Address target); + // Get the size of the special target encoded at 'instruction_payload'. + inline static int deserialization_special_target_size( + Address instruction_payload); + // This sets the internal reference at the pc. inline static void deserialization_set_target_internal_reference_at( Address pc, Address target, @@ -832,6 +836,42 @@ class Assembler : public AssemblerBase { } #undef DECLARE_S390_RXY_INSTRUCTIONS +inline void rsy_form(Opcode op, int f1, int f2, int f3, const int f4) { + DCHECK(is_int20(f4)); + DCHECK(is_uint16(op)); + uint64_t code = (getfield<uint64_t, 6, 0, 8>(op >> 8) | + getfield<uint64_t, 6, 8, 12>(f1) | + getfield<uint64_t, 6, 12, 16>(f2) | + getfield<uint64_t, 6, 16, 20>(f3) | + getfield<uint64_t, 6, 20, 32>(f4 & 0x0fff) | + getfield<uint64_t, 6, 32, 40>(f4 >> 12) | + getfield<uint64_t, 6, 40, 48>(op & 0xff)); + emit6bytes(code); +} + +#define DECLARE_S390_RSY_A_INSTRUCTIONS(name, op_name, op_value) \ + void name(Register r1, Register r3, Register b2, Disp d2 = 0) { \ + rsy_form(op_name, r1.code(), r3.code(), b2.code(), d2); \ + } \ + void name(Register r1, Register r3, Operand d2) { \ + name(r1, r3, r0, d2.immediate()); \ + } \ + void name(Register r1, Register r3, const MemOperand& opnd) { \ + name(r1, r3, opnd.getBaseRegister(), opnd.getDisplacement()); \ + } + S390_RSY_A_OPCODE_LIST(DECLARE_S390_RSY_A_INSTRUCTIONS); +#undef DECLARE_S390_RSY_A_INSTRUCTIONS + +#define DECLARE_S390_RSY_B_INSTRUCTIONS(name, op_name, op_value) \ + void name(Register r1, Condition m3, Register b2, Disp d2) { \ + rsy_form(op_name, r1.code(), m3, b2.code(), d2); \ + } \ + void name(Register r1, Condition m3, const MemOperand& opnd) { \ + name(r1, m3, opnd.getBaseRegister(), opnd.getDisplacement()); \ + } + S390_RSY_B_OPCODE_LIST(DECLARE_S390_RSY_B_INSTRUCTIONS); +#undef DECLARE_S390_RSY_B_INSTRUCTIONS + // Helper for unconditional branch to Label with update to save register void b(Register r, Label* l) { int32_t halfwords = branch_offset(l) / 2; @@ -1112,21 +1152,15 @@ class Assembler : public AssemblerBase { // Load Multiple Instructions void lm(Register r1, Register r2, const MemOperand& src); - void lmy(Register r1, Register r2, const MemOperand& src); - void lmg(Register r1, Register r2, const MemOperand& src); // Load On Condition Instructions void locr(Condition m3, Register r1, Register r2); void locgr(Condition m3, Register r1, Register r2); - void loc(Condition m3, Register r1, const MemOperand& src); - void locg(Condition m3, Register r1, const MemOperand& src); // Store Instructions // Store Multiple Instructions void stm(Register r1, Register r2, const MemOperand& src); - void stmy(Register r1, Register r2, const MemOperand& src); - void stmg(Register r1, Register r2, const MemOperand& src); // Compare Instructions void chi(Register r, const Operand& opnd); @@ -1139,50 +1173,24 @@ class Assembler : public AssemblerBase { // Compare and Swap Instructions void cs(Register r1, Register r2, const MemOperand& src); - void csy(Register r1, Register r2, const MemOperand& src); - void csg(Register r1, Register r2, const MemOperand& src); // Test Under Mask Instructions void tm(const MemOperand& mem, const Operand& imm); void tmy(const MemOperand& mem, const Operand& imm); - // Rotate Instructions - void rll(Register r1, Register r3, Register opnd); - void rll(Register r1, Register r3, const Operand& opnd); - void rll(Register r1, Register r3, Register r2, const Operand& opnd); - void rllg(Register r1, Register r3, const Operand& opnd); - void rllg(Register r1, Register r3, const Register opnd); - void rllg(Register r1, Register r3, Register r2, const Operand& opnd); - // Shift Instructions (32) void sll(Register r1, Register opnd); void sll(Register r1, const Operand& opnd); - void sllk(Register r1, Register r3, Register opnd); - void sllk(Register r1, Register r3, const Operand& opnd); void srl(Register r1, Register opnd); void srl(Register r1, const Operand& opnd); - void srlk(Register r1, Register r3, Register opnd); - void srlk(Register r1, Register r3, const Operand& opnd); void sra(Register r1, Register opnd); void sra(Register r1, const Operand& opnd); - void srak(Register r1, Register r3, Register opnd); - void srak(Register r1, Register r3, const Operand& opnd); void sla(Register r1, Register opnd); void sla(Register r1, const Operand& opnd); - void slak(Register r1, Register r3, Register opnd); - void slak(Register r1, Register r3, const Operand& opnd); // Shift Instructions (64) - void sllg(Register r1, Register r3, const Operand& opnd); - void sllg(Register r1, Register r3, const Register opnd); - void srlg(Register r1, Register r3, const Operand& opnd); - void srlg(Register r1, Register r3, const Register opnd); - void srag(Register r1, Register r3, const Operand& opnd); - void srag(Register r1, Register r3, const Register opnd); void srda(Register r1, const Operand& opnd); void srdl(Register r1, const Operand& opnd); - void slag(Register r1, Register r3, const Operand& opnd); - void slag(Register r1, Register r3, const Register opnd); void sldl(Register r1, Register b2, const Operand& opnd); void srdl(Register r1, Register b2, const Operand& opnd); void srda(Register r1, Register b2, const Operand& opnd); @@ -1533,12 +1541,6 @@ class Assembler : public AssemblerBase { inline void rsi_form(Opcode op, Register r1, Register r3, const Operand& i2); inline void rsl_form(Opcode op, Length l1, Register b2, Disp d2); - - inline void rsy_form(Opcode op, Register r1, Register r3, Register b2, - const Disp d2); - inline void rsy_form(Opcode op, Register r1, Condition m3, Register b2, - const Disp d2); - inline void rxe_form(Opcode op, Register r1, Register x2, Register b2, Disp d2); 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