1 files changed, 17 insertions, 16 deletions

diff --git a/deps/v8/src/arm/disasm-arm.cc b/deps/v8/src/arm/disasm-arm.cc
index 5dab458889..0c6ef132f8 100644
--- a/deps/v8/src/arm/disasm-arm.cc
+++ b/deps/v8/src/arm/disasm-arm.cc
@@ -669,7 +669,7 @@ int Decoder::FormatOption(Instruction* instr, const char* format) {
     case 'A': {
       // Print pc-relative address.
       int offset = instr->Offset12Value();
-      byte* pc = reinterpret_cast<byte*>(instr) + Instruction::kPCReadOffset;
+      byte* pc = reinterpret_cast<byte*>(instr) + Instruction::kPcLoadDelta;
       byte* addr;
       switch (instr->PUField()) {
         case db_x: {
@@ -786,6 +786,9 @@ void Decoder::DecodeType01(Instruction* instr) {
               case 0:
                 Format(instr, "ldrex'cond 'rt, ['rn]");
                 break;
+              case 1:
+                Format(instr, "ldrexd'cond 'rt, ['rn]");
+                break;
               case 2:
                 Format(instr, "ldrexb'cond 'rt, ['rn]");
                 break;
@@ -804,6 +807,9 @@ void Decoder::DecodeType01(Instruction* instr) {
               case 0:
                 Format(instr, "strex'cond 'rd, 'rm, ['rn]");
                 break;
+              case 1:
+                Format(instr, "strexd'cond 'rd, 'rm, ['rn]");
+                break;
               case 2:
                 Format(instr, "strexb'cond 'rd, 'rm, ['rn]");
                 break;
@@ -1194,6 +1200,9 @@ void Decoder::DecodeType3(Instruction* instr) {
                     }
                   }
                 }
+              } else if (instr->Bits(27, 16) == 0x6BF &&
+                         instr->Bits(11, 4) == 0xF3) {
+                Format(instr, "rev'cond 'rd, 'rm");
               } else {
                 UNREACHABLE();
               }
@@ -1416,7 +1425,7 @@ int Decoder::DecodeType7(Instruction* instr) {
         break;
     }
   }
-  return Instruction::kInstrSize;
+  return kInstrSize;
 }
 
 
@@ -2599,14 +2608,14 @@ int Decoder::InstructionDecode(byte* instr_ptr) {
                               instr->InstructionBits());
   if (instr->ConditionField() == kSpecialCondition) {
     DecodeSpecialCondition(instr);
-    return Instruction::kInstrSize;
+    return kInstrSize;
   }
   int instruction_bits = *(reinterpret_cast<int*>(instr_ptr));
   if ((instruction_bits & kConstantPoolMarkerMask) == kConstantPoolMarker) {
     out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
                                 "constant pool begin (length %d)",
                                 DecodeConstantPoolLength(instruction_bits));
-    return Instruction::kInstrSize;
+    return kInstrSize;
   }
   switch (instr->TypeValue()) {
     case 0:
@@ -2643,7 +2652,7 @@ int Decoder::InstructionDecode(byte* instr_ptr) {
       break;
     }
   }
-  return Instruction::kInstrSize;
+  return kInstrSize;
 }
 
 
@@ -2693,13 +2702,6 @@ const char* NameConverter::NameInCode(byte* addr) const {
 
 //------------------------------------------------------------------------------
 
-Disassembler::Disassembler(const NameConverter& converter)
-    : converter_(converter) {}
-
-
-Disassembler::~Disassembler() {}
-
-
 int Disassembler::InstructionDecode(v8::internal::Vector<char> buffer,
                                     byte* instruction) {
   v8::internal::Decoder d(converter_, buffer);
@@ -2711,10 +2713,10 @@ int Disassembler::ConstantPoolSizeAt(byte* instruction) {
   return v8::internal::Decoder::ConstantPoolSizeAt(instruction);
 }
 
-
-void Disassembler::Disassemble(FILE* f, byte* begin, byte* end) {
+void Disassembler::Disassemble(FILE* f, byte* begin, byte* end,
+                               UnimplementedOpcodeAction unimplemented_action) {
   NameConverter converter;
-  Disassembler d(converter);
+  Disassembler d(converter, unimplemented_action);
   for (byte* pc = begin; pc < end;) {
     v8::internal::EmbeddedVector<char, 128> buffer;
     buffer[0] = '\0';
@@ -2725,7 +2727,6 @@ void Disassembler::Disassemble(FILE* f, byte* begin, byte* end) {
   }
 }
 
-
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_ARM