diff options
Diffstat (limited to 'deps/v8/src/arm64/cpu-arm64.cc')
| -rw-r--r-- | deps/v8/src/arm64/cpu-arm64.cc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/deps/v8/src/arm64/cpu-arm64.cc b/deps/v8/src/arm64/cpu-arm64.cc index cf2cc57215..37bb4a22ba 100644 --- a/deps/v8/src/arm64/cpu-arm64.cc +++ b/deps/v8/src/arm64/cpu-arm64.cc @@ -19,8 +19,8 @@ class CacheLineSizes { cache_type_register_ = 0; #else // Copy the content of the cache type register to a core register. - __asm__ __volatile__ ("mrs %[ctr], ctr_el0" // NOLINT - : [ctr] "=r" (cache_type_register_)); + __asm__ __volatile__("mrs %[ctr], ctr_el0" // NOLINT + : [ctr] "=r"(cache_type_register_)); #endif } @@ -37,7 +37,6 @@ class CacheLineSizes { uint32_t cache_type_register_; }; - void CpuFeatures::FlushICache(void* address, size_t length) { #ifdef V8_HOST_ARCH_ARM64 // The code below assumes user space cache operations are allowed. The goal |