summaryrefslogtreecommitdiff
path: root/deps/v8/src/codegen/mips64/assembler-mips64.h
diff options
context:
space:
mode:
Diffstat (limited to 'deps/v8/src/codegen/mips64/assembler-mips64.h')
-rw-r--r--deps/v8/src/codegen/mips64/assembler-mips64.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/deps/v8/src/codegen/mips64/assembler-mips64.h b/deps/v8/src/codegen/mips64/assembler-mips64.h
index 26205ccefd..41ebea8e5b 100644
--- a/deps/v8/src/codegen/mips64/assembler-mips64.h
+++ b/deps/v8/src/codegen/mips64/assembler-mips64.h
@@ -36,12 +36,14 @@
#define V8_CODEGEN_MIPS64_ASSEMBLER_MIPS64_H_
#include <stdio.h>
+
#include <memory>
#include <set>
#include "src/codegen/assembler.h"
#include "src/codegen/external-reference.h"
#include "src/codegen/label.h"
+#include "src/codegen/machine-type.h"
#include "src/codegen/mips64/constants-mips64.h"
#include "src/codegen/mips64/register-mips64.h"
#include "src/objects/contexts.h"
@@ -1951,6 +1953,20 @@ class V8_EXPORT_PRIVATE V8_NODISCARD UseScratchRegisterScope {
RegList old_available_;
};
+// Helper struct for load lane and store lane to indicate what memory size
+// to be encoded in the opcode, and the new lane index.
+class LoadStoreLaneParams {
+ public:
+ MSASize sz;
+ uint8_t laneidx;
+
+ LoadStoreLaneParams(MachineRepresentation rep, uint8_t laneidx);
+
+ private:
+ LoadStoreLaneParams(uint8_t laneidx, MSASize sz, int lanes)
+ : sz(sz), laneidx(laneidx % lanes) {}
+};
+
} // namespace internal
} // namespace v8