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Diffstat (limited to 'deps/v8/src/codegen/riscv/base-assembler-riscv.h')
| -rw-r--r-- | deps/v8/src/codegen/riscv/base-assembler-riscv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/deps/v8/src/codegen/riscv/base-assembler-riscv.h b/deps/v8/src/codegen/riscv/base-assembler-riscv.h index 8bdfd4ecd1..7c2d02b208 100644 --- a/deps/v8/src/codegen/riscv/base-assembler-riscv.h +++ b/deps/v8/src/codegen/riscv/base-assembler-riscv.h @@ -78,6 +78,8 @@ class AssemblerRiscvBase { virtual void emit(Instr x) = 0; virtual void emit(ShortInstr x) = 0; virtual void emit(uint64_t x) = 0; + + virtual void ClearVectorunit() = 0; // Instruction generation. // ----- Top-level instruction formats match those in the ISA manual |