diff options
Diffstat (limited to 'deps/v8/src/codegen/riscv64/register-riscv64.h')
| -rw-r--r-- | deps/v8/src/codegen/riscv64/register-riscv64.h | 102 |
1 files changed, 10 insertions, 92 deletions
diff --git a/deps/v8/src/codegen/riscv64/register-riscv64.h b/deps/v8/src/codegen/riscv64/register-riscv64.h index 2b1e4d3d65..fa5ffe4043 100644 --- a/deps/v8/src/codegen/riscv64/register-riscv64.h +++ b/deps/v8/src/codegen/riscv64/register-riscv64.h @@ -5,8 +5,7 @@ #ifndef V8_CODEGEN_RISCV64_REGISTER_RISCV64_H_ #define V8_CODEGEN_RISCV64_REGISTER_RISCV64_H_ -#include "src/codegen/register.h" -#include "src/codegen/reglist.h" +#include "src/codegen/register-base.h" #include "src/codegen/riscv64/constants-riscv64.h" namespace v8 { @@ -55,10 +54,11 @@ namespace internal { V(v16) V(v17) V(v18) V(v19) V(v20) V(v21) V(v22) V(v23) \ V(v24) V(v25) V(v26) V(v27) V(v28) V(v29) V(v30) V(v31) -#define UNALLOACTABLE_VECTOR_REGISTERS(V) \ - V(v9) V(v10) V(v11) V(v12) V(v13) V(v14) V(v15) \ - V(v18) V(v19) V(v20) V(v21) V(v22) V(v23) \ - V(v24) V(v25) +#define ALLOCATABLE_SIMD128_REGISTERS(V) \ + V(v1) V(v2) V(v3) V(v4) V(v5) V(v6) V(v7) \ + V(v10) V(v11) V(v12) V(v13) V(v14) V(v15) V(v16) \ + V(v17) V(v18) V(v19) V(v20) V(v21) V(v22) V(v26) \ + V(v27) V(v28) V(v29) V(v30) V(v31) #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ V(ft1) V(ft2) V(ft3) V(ft4) V(ft5) V(ft6) V(ft7) V(ft8) \ @@ -77,83 +77,6 @@ constexpr int ArgumentPaddingSlots(int argument_count) { // encoding. const int kNumRegs = 32; -const RegList kJSCallerSaved = 1 << 5 | // t0 - 1 << 6 | // t1 - 1 << 7 | // t2 - 1 << 10 | // a0 - 1 << 11 | // a1 - 1 << 12 | // a2 - 1 << 13 | // a3 - 1 << 14 | // a4 - 1 << 15 | // a5 - 1 << 16 | // a6 - 1 << 17 | // a7 - 1 << 29; // t4 - -const int kNumJSCallerSaved = 12; - -// Callee-saved registers preserved when switching from C to JavaScript. -const RegList kCalleeSaved = 1 << 8 | // fp/s0 - 1 << 9 | // s1 - 1 << 18 | // s2 - 1 << 19 | // s3 scratch register - 1 << 20 | // s4 scratch register 2 - 1 << 21 | // s5 - 1 << 22 | // s6 (roots in Javascript code) - 1 << 23 | // s7 (cp in Javascript code) - 1 << 24 | // s8 - 1 << 25 | // s9 - 1 << 26 | // s10 - 1 << 27; // s11 - -const int kNumCalleeSaved = 12; - -const RegList kCalleeSavedFPU = 1 << 8 | // fs0 - 1 << 9 | // fs1 - 1 << 18 | // fs2 - 1 << 19 | // fs3 - 1 << 20 | // fs4 - 1 << 21 | // fs5 - 1 << 22 | // fs6 - 1 << 23 | // fs7 - 1 << 24 | // fs8 - 1 << 25 | // fs9 - 1 << 26 | // fs10 - 1 << 27; // fs11 - -const int kNumCalleeSavedFPU = 12; - -const RegList kCallerSavedFPU = 1 << 0 | // ft0 - 1 << 1 | // ft1 - 1 << 2 | // ft2 - 1 << 3 | // ft3 - 1 << 4 | // ft4 - 1 << 5 | // ft5 - 1 << 6 | // ft6 - 1 << 7 | // ft7 - 1 << 10 | // fa0 - 1 << 11 | // fa1 - 1 << 12 | // fa2 - 1 << 13 | // fa3 - 1 << 14 | // fa4 - 1 << 15 | // fa5 - 1 << 16 | // fa6 - 1 << 17 | // fa7 - 1 << 28 | // ft8 - 1 << 29 | // ft9 - 1 << 30 | // ft10 - 1 << 31; // ft11 - -// Number of registers for which space is reserved in safepoints. Must be a -// multiple of 8. -const int kNumSafepointRegisters = 32; - -// Define the list of registers actually saved at safepoints. -// Note that the number of saved registers may be smaller than the reserved -// space, i.e. kNumSafepointSavedRegisters <= kNumSafepointRegisters. -const RegList kSafepointSavedRegisters = kJSCallerSaved | kCalleeSaved; -const int kNumSafepointSavedRegisters = kNumJSCallerSaved + kNumCalleeSaved; - const int kUndefIndex = -1; // Map with indexes on stack that corresponds to codes of saved registers. const int kSafepointRegisterStackIndexMap[kNumRegs] = {kUndefIndex, // zero_reg @@ -251,7 +174,7 @@ int ToNumber(Register reg); Register ToRegister(int num); constexpr bool kPadArguments = false; -constexpr bool kSimpleFPAliasing = true; +constexpr AliasingKind kFPAliasing = AliasingKind::kIndependent; constexpr bool kSimdMaskRegisters = false; enum DoubleRegisterCode { @@ -296,12 +219,7 @@ class FPURegister : public RegisterBase<FPURegister, kDoubleAfterLast> { // this cl, in order to facilitate modification, it is assumed that the vector // register and floating point register are shared. VRegister toV() const { - DCHECK(base::IsInRange(code(), 0, kVRAfterLast - 1)); - // FIXME(riscv): Because V0 is a special mask reg, so can't allocate it. - // And v8 is unallocated so we replace v0 with v8 - if (code() == 0) { - return VRegister(8); - } + DCHECK(base::IsInRange(static_cast<int>(code()), 0, kVRAfterLast - 1)); return VRegister(code()); } @@ -379,8 +297,8 @@ constexpr Register kWasmInstanceRegister = a0; constexpr Register kWasmCompileLazyFuncIndexRegister = t0; constexpr DoubleRegister kFPReturnRegister0 = fa0; -constexpr VRegister kSimd128ScratchReg = v26; -constexpr VRegister kSimd128ScratchReg2 = v27; +constexpr VRegister kSimd128ScratchReg = v24; +constexpr VRegister kSimd128ScratchReg2 = v23; constexpr VRegister kSimd128ScratchReg3 = v8; constexpr VRegister kSimd128RegZero = v25; |