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-rw-r--r--deps/v8/src/compiler/instruction.cc108
1 files changed, 62 insertions, 46 deletions
diff --git a/deps/v8/src/compiler/instruction.cc b/deps/v8/src/compiler/instruction.cc
index 615b644334..0df7ca0316 100644
--- a/deps/v8/src/compiler/instruction.cc
+++ b/deps/v8/src/compiler/instruction.cc
@@ -314,7 +314,6 @@ bool Instruction::AreMovesRedundant() const {
return true;
}
-
void Instruction::Print(const RegisterConfiguration* config) const {
OFStream os(stdout);
PrintableInstruction wrapper;
@@ -569,6 +568,10 @@ void PhiInstruction::SetInput(size_t offset, int virtual_register) {
operands_[offset] = virtual_register;
}
+void PhiInstruction::RenameInput(size_t offset, int virtual_register) {
+ DCHECK_NE(InstructionOperand::kInvalidVirtualRegister, operands_[offset]);
+ operands_[offset] = virtual_register;
+}
InstructionBlock::InstructionBlock(Zone* zone, RpoNumber rpo_number,
RpoNumber loop_header, RpoNumber loop_end,
@@ -631,6 +634,58 @@ static InstructionBlock* InstructionBlockFor(Zone* zone,
return instr_block;
}
+std::ostream& operator<<(std::ostream& os,
+ PrintableInstructionBlock& printable_block) {
+ const InstructionBlock* block = printable_block.block_;
+ const RegisterConfiguration* config = printable_block.register_configuration_;
+ const InstructionSequence* code = printable_block.code_;
+
+ os << "B" << block->rpo_number();
+ os << ": AO#" << block->ao_number();
+ if (block->IsDeferred()) os << " (deferred)";
+ if (!block->needs_frame()) os << " (no frame)";
+ if (block->must_construct_frame()) os << " (construct frame)";
+ if (block->must_deconstruct_frame()) os << " (deconstruct frame)";
+ if (block->IsLoopHeader()) {
+ os << " loop blocks: [" << block->rpo_number() << ", " << block->loop_end()
+ << ")";
+ }
+ os << " instructions: [" << block->code_start() << ", " << block->code_end()
+ << ")" << std::endl
+ << " predecessors:";
+
+ for (RpoNumber pred : block->predecessors()) {
+ os << " B" << pred.ToInt();
+ }
+ os << std::endl;
+
+ for (const PhiInstruction* phi : block->phis()) {
+ PrintableInstructionOperand printable_op = {config, phi->output()};
+ os << " phi: " << printable_op << " =";
+ for (int input : phi->operands()) {
+ os << " v" << input;
+ }
+ os << std::endl;
+ }
+
+ ScopedVector<char> buf(32);
+ PrintableInstruction printable_instr;
+ printable_instr.register_configuration_ = config;
+ for (int j = block->first_instruction_index();
+ j <= block->last_instruction_index(); j++) {
+ // TODO(svenpanne) Add some basic formatting to our streams.
+ SNPrintF(buf, "%5d", j);
+ printable_instr.instr_ = code->InstructionAt(j);
+ os << " " << buf.start() << ": " << printable_instr << std::endl;
+ }
+
+ for (RpoNumber succ : block->successors()) {
+ os << " B" << succ.ToInt();
+ }
+ os << std::endl;
+ return os;
+}
+
InstructionBlocks* InstructionSequence::InstructionBlocksFor(
Zone* zone, const Schedule* schedule) {
InstructionBlocks* blocks = zone->NewArray<InstructionBlocks>(1);
@@ -874,7 +929,6 @@ void InstructionSequence::SetSourcePosition(const Instruction* instr,
source_positions_.insert(std::make_pair(instr, value));
}
-
void InstructionSequence::Print(const RegisterConfiguration* config) const {
OFStream os(stdout);
PrintableInstructionSequence wrapper;
@@ -891,49 +945,8 @@ void InstructionSequence::PrintBlock(const RegisterConfiguration* config,
RpoNumber rpo = RpoNumber::FromInt(block_id);
const InstructionBlock* block = InstructionBlockAt(rpo);
CHECK(block->rpo_number() == rpo);
-
- os << "B" << block->rpo_number();
- os << ": AO#" << block->ao_number();
- if (block->IsDeferred()) os << " (deferred)";
- if (!block->needs_frame()) os << " (no frame)";
- if (block->must_construct_frame()) os << " (construct frame)";
- if (block->must_deconstruct_frame()) os << " (deconstruct frame)";
- if (block->IsLoopHeader()) {
- os << " loop blocks: [" << block->rpo_number() << ", " << block->loop_end()
- << ")";
- }
- os << " instructions: [" << block->code_start() << ", " << block->code_end()
- << ")\n predecessors:";
-
- for (RpoNumber pred : block->predecessors()) {
- os << " B" << pred.ToInt();
- }
- os << "\n";
-
- for (const PhiInstruction* phi : block->phis()) {
- PrintableInstructionOperand printable_op = {config, phi->output()};
- os << " phi: " << printable_op << " =";
- for (int input : phi->operands()) {
- os << " v" << input;
- }
- os << "\n";
- }
-
- ScopedVector<char> buf(32);
- PrintableInstruction printable_instr;
- printable_instr.register_configuration_ = config;
- for (int j = block->first_instruction_index();
- j <= block->last_instruction_index(); j++) {
- // TODO(svenpanne) Add some basic formatting to our streams.
- SNPrintF(buf, "%5d", j);
- printable_instr.instr_ = InstructionAt(j);
- os << " " << buf.start() << ": " << printable_instr << "\n";
- }
-
- for (RpoNumber succ : block->successors()) {
- os << " B" << succ.ToInt();
- }
- os << "\n";
+ PrintableInstructionBlock printable_block = {config, block, this};
+ os << printable_block << std::endl;
}
void InstructionSequence::PrintBlock(int block_id) const {
@@ -1020,8 +1033,11 @@ std::ostream& operator<<(std::ostream& os,
it != code.constants_.end(); ++i, ++it) {
os << "CST#" << i << ": v" << it->first << " = " << it->second << "\n";
}
+ PrintableInstructionBlock printable_block = {
+ printable.register_configuration_, nullptr, printable.sequence_};
for (int i = 0; i < code.InstructionBlockCount(); i++) {
- printable.sequence_->PrintBlock(printable.register_configuration_, i);
+ printable_block.block_ = code.InstructionBlockAt(RpoNumber::FromInt(i));
+ os << printable_block;
}
return os;
}