1 files changed, 2 insertions, 9 deletions
diff --git a/deps/v8/src/register-configuration.h b/deps/v8/src/register-configuration.h
index 2cb7c91eec..946c82e56c 100644
--- a/deps/v8/src/register-configuration.h
+++ b/deps/v8/src/register-configuration.h
@@ -6,6 +6,7 @@
 #define V8_COMPILER_REGISTER_CONFIGURATION_H_
 
 #include "src/base/macros.h"
+#include "src/globals.h"
 #include "src/machine-type.h"
 
 namespace v8 {
@@ -13,7 +14,7 @@ namespace internal {
 
 // An architecture independent representation of the sets of registers available
 // for instruction creation.
-class RegisterConfiguration {
+class V8_EXPORT_PRIVATE RegisterConfiguration {
  public:
   enum AliasingKind {
     // Registers alias a single register of every other size (e.g. Intel).
@@ -35,7 +36,6 @@ class RegisterConfiguration {
   RegisterConfiguration(int num_general_registers, int num_double_registers,
                         int num_allocatable_general_registers,
                         int num_allocatable_double_registers,
-                        int num_allocatable_aliased_double_registers,
                         const int* allocatable_general_codes,
                         const int* allocatable_double_codes,
                         AliasingKind fp_aliasing_kind,
@@ -57,12 +57,6 @@ class RegisterConfiguration {
   int num_allocatable_double_registers() const {
     return num_allocatable_double_registers_;
   }
-  // TODO(bbudge): This is a temporary work-around required because our
-  // register allocator does not yet support the aliasing of single/double
-  // registers on ARM.
-  int num_allocatable_aliased_double_registers() const {
-    return num_allocatable_aliased_double_registers_;
-  }
   int num_allocatable_simd128_registers() const {
     return num_allocatable_simd128_registers_;
   }
@@ -142,7 +136,6 @@ class RegisterConfiguration {
   int num_allocatable_general_registers_;
   int num_allocatable_float_registers_;
   int num_allocatable_double_registers_;
-  int num_allocatable_aliased_double_registers_;
   int num_allocatable_simd128_registers_;
   int32_t allocatable_general_codes_mask_;
   int32_t allocatable_float_codes_mask_;