blob: 243fa29a4675a9420d3433b85bace655b8964b72 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
// Copyright 2014 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
// CPU specific code for ppc independent of OS goes here.
#if V8_TARGET_ARCH_PPC
#include "src/codegen/cpu-features.h"
#define INSTR_AND_DATA_CACHE_COHERENCY LWSYNC
namespace v8 {
namespace internal {
void CpuFeatures::FlushICache(void* buffer, size_t size) {
#if !defined(USE_SIMULATOR)
if (CpuFeatures::IsSupported(INSTR_AND_DATA_CACHE_COHERENCY)) {
__asm__ __volatile__(
"sync \n"
"icbi 0, %0 \n"
"isync \n"
: /* no output */
: "r"(buffer)
: "memory");
return;
}
const int kCacheLineSize = CpuFeatures::icache_line_size();
intptr_t mask = kCacheLineSize - 1;
byte* start =
reinterpret_cast<byte*>(reinterpret_cast<intptr_t>(buffer) & ~mask);
byte* end = static_cast<byte*>(buffer) + size;
for (byte* pointer = start; pointer < end; pointer += kCacheLineSize) {
__asm__(
"dcbf 0, %0 \n"
"sync \n"
"icbi 0, %0 \n"
"isync \n"
: /* no output */
: "r"(pointer));
}
#endif // !USE_SIMULATOR
}
} // namespace internal
} // namespace v8
#undef INSTR_AND_DATA_CACHE_COHERENCY
#endif // V8_TARGET_ARCH_PPC
|