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authorAlexandre Courbot <acourbot@nvidia.com>2015-02-20 18:23:02 +0900
committerBen Skeggs <bskeggs@redhat.com>2015-03-17 09:45:11 +1000
commit3bc5960645a5d152e74ee92582b0ce3ed0f8cf26 (patch)
tree084962d99f37b8c2bec27263c144b24fe440ff99 /lib
parentd588b16f4b08c9e858531bac7f5278d911cda3a0 (diff)
downloadnouveau-3bc5960645a5d152e74ee92582b0ce3ed0f8cf26.tar.gz
instmem/gk20a: use DMA attributes
instmem for GK20A is allocated using dma_alloc_coherent(), which provides us with a coherent CPU mapping that we never use because instmem objects are accessed through PRAMIN. Switch to dma_alloc_attrs() which gives us the option to dismiss that CPU mapping and free up some CPU virtual space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'lib')
-rw-r--r--lib/include/nvif/os.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/lib/include/nvif/os.h b/lib/include/nvif/os.h
index f6391a58f..b4d307e3a 100644
--- a/lib/include/nvif/os.h
+++ b/lib/include/nvif/os.h
@@ -683,6 +683,37 @@ dma_free_coherent(struct device *dev, size_t sz, void *vaddr, dma_addr_t bus)
{
}
+enum dma_attr {
+ DMA_ATTR_WRITE_BARRIER,
+ DMA_ATTR_WEAK_ORDERING,
+ DMA_ATTR_WRITE_COMBINE,
+ DMA_ATTR_NON_CONSISTENT,
+ DMA_ATTR_NO_KERNEL_MAPPING,
+ DMA_ATTR_SKIP_CPU_SYNC,
+ DMA_ATTR_FORCE_CONTIGUOUS,
+ DMA_ATTR_MAX,
+};
+
+struct dma_attrs {
+};
+
+static inline void init_dma_attrs(struct dma_attrs *attrs) {}
+static inline void dma_set_attr(enum dma_attr attr, struct dma_attrs *attrs) {}
+
+static inline void *
+dma_alloc_attrs(struct device *dev, size_t sz, dma_addr_t *hdl, gfp_t gfp,
+ struct dma_attrs *attrs)
+{
+ return NULL;
+}
+
+static inline void
+dma_free_attrs(struct device *dev, size_t sz, void *vaddr, dma_addr_t bus,
+ struct dma_attrs *attrs)
+{
+}
+
+
/******************************************************************************
* PCI
*****************************************************************************/