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* bios/volt: pointers are 32-bitBen Skeggs2016-11-281-4/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/vmap: pointers are 32-bitBen Skeggs2016-11-281-4/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/timing: pointers are 32-bitBen Skeggs2016-11-281-3/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/perf: pointers are 32-bitBen Skeggs2016-11-281-3/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/fan: pointers are 32-bitBen Skeggs2016-11-281-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/cstep: pointers are 32-bitBen Skeggs2016-11-281-6/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/boost: pointers are 32-bitBen Skeggs2016-11-281-6/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp/gp102: rename from gp104Ben Skeggs2016-11-162-3/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ce/gp102: rename from gp104Ben Skeggs2016-11-161-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fb/gp102: rename from gp104Ben Skeggs2016-11-161-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/gp102: initial implementationBen Skeggs2016-11-091-0/+1
| | | | | | | GP102/GP104 require a harder reset of PMU prior to DEVINIT, or the IFR image will hang. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/gp100: initial implementationBen Skeggs2016-11-091-0/+1
| | | | | | Just enough to hookup preinit reset(), which DEVINIT will depend on later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp/sor/gf119-: add method to program mst payload informationBen Skeggs2016-11-071-0/+10
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp/sor/gf119-: add method to control mst enableBen Skeggs2016-11-071-0/+7
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* nvif: helper to match against supported class listBen Skeggs2016-11-071-0/+29
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* silence sparse warnings about symbols not being marked staticBen Skeggs2016-11-071-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fb: add gm20b deviceAlexandre Courbot2016-11-071-0/+1
| | | | | | | | | | gm20b's FB has the same capabilities as gm200, minus the ability to allocate RAM. Create a device that reflects this instead of re-using the gk20a device which may be incorrect. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-By: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: add a LED driver for the NVIDIA logoMartin Peres2016-11-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | We received a donation of a Titan which has this useless feature allowing users to control the brightness of the LED behind the logo of NVIDIA. In the true spirit of open source, let's expose that to the users of very expensive cards! This patch hooks up this LED/PWM to the LED subsystem which allows blinking it in sync with cpu/disk/network/whatever activity (heartbeat is quite nice!). Users may also implement some breathing effect or morse code support in the userspace if they feel like it. v2: - surround the use of the LED framework with ifdef CONFIG_LEDS_CLASS v3: - avoid using ifdefs everywhere, follow the recommendations of /doc/Documentation/CodingStyle. Suggested by Emil Velikov. v4 (Ben): - squashed series of fixes from ml Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt/gf100-: Add speedoKarol Herbst2016-11-041-0/+2
| | | | | | | | v5: Squashed speedo related commits. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt: Add implementation for gf100Karol Herbst2016-11-041-0/+1
| | | | | | | | Since gf100 we need a speedo value for calculating the voltage. The readout will be added in a later patch. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/vmap: unk0 field is the modeKarol Herbst2016-11-041-1/+1
| | | | | | | | | Depending on the value a different formular is used to calculated the voltage for this entry. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk: Allow boosting only when NvBoost is setKarol Herbst2016-11-041-1/+8
| | | | | | | | | | | | | | 0: base clock from the vbios is max clock (default) 1: boost only to boost clock from the vbios 2: boost to max clock available v2: Moved into nvkm_cstate_valid. v4: Check the existence of the clocks before limiting. v5: Default to boost level 0. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios: Add parsing of VPSTATE tableKarol Herbst2016-11-041-0/+24
| | | | | | | | | | | | | | | | | | | This table contains three important clocks: base clock: This is the non boosted max clock. tdp clock: The clock at wich the vbios guarentees the TDP won't ever be exceeded at max load (seems to be always the same as the base clock, but behaves differently). boost clock: The avg clock the gpu will stay boosted to. It doesn't seem to affect the behaviour of the nvidia driver at all though. v2: Make clear that base/boost/tdp fields are ids. v5: Rename Base clock to vpstate. Make vbios pointers 32bit. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk: Respect voltage limits in nvkm_cstate_progKarol Herbst2016-11-041-0/+1
| | | | | | | | | | | | | | | | | We should never allow to select a cstate which current voltage (depending on the temperature) is higher than 1. the max volt entries in the voltage map table. 2. what tha gpu actually can volt to. v3: Use find_best for all cstates before actually trying. Add nvkm_cstate_get function to get cstate by index. v5: Cstates with voltages lower then min_uv are valid. Move nvkm_cstate_get into the previous commit. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk: Fixup cstate selectionKarol Herbst2016-11-041-0/+4
| | | | | | | | | | | | Now the cstatei parameter can be used of the nvkm_cstate_prog function to select a specific cstate. v5: Make a constant for the magic value. Use list_last_entry. Add nvkm_cstate_get here instead of in the next commit. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt: Add temperature parameter to nvkm_volt_mapKarol Herbst2016-11-041-1/+2
| | | | | | | | | | | | | The voltage entries actually may map to a different voltage depending on the current temperature. v2: Only read the temperature when actually needed. v5: Be smarter about using max(). Don't read the temperature anymore. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk: Let nvkm_clk_tstate take a temperature valueKarol Herbst2016-11-041-2/+2
| | | | | | | | | | This way other subdevs can notify the clk subdev about temperature changes without the need of clk to poll that value. Also make this function safe to be called from an interrupt handler. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk: Add index field to nvkm_cstateKarol Herbst2016-11-041-0/+1
| | | | | | | | | | | It is better to read out the id out of the cstate struct directly instead of iterating over the list of cstates over and over again. Especially when we start saving pointers to a nvkm_cstate struct, it makes things easier. v5: Rename field to id. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt: Add min_id parameter to nvkm_volt_set_idKarol Herbst2016-11-041-1/+1
| | | | | | | | | | | Each pstate has its own voltage map entry like each cstate has. The voltages of those entries act as a floor value for the currently selected pstate and nvidia never sets a voltage below them. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt: Parse the max voltage map entriesKarol Herbst2016-11-042-0/+13
| | | | | | | | | | | | | | | | | | | There are at least three "max" entries, which specify the max voltage. Because they are actually normal voltage map entries, they can also be affected by the temperature. Nvidia respects those entries and if they get changed, nvidia uses the lower voltage from all three. We shouldn't exceed those voltages at any given time. v2: State what those entries do in the source. v3: Add the third max entry. v5: Better describe the entries. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk: Don't create cstates with voltages higher than what the gpu can doKarol Herbst2016-11-041-0/+1
| | | | | | | | | | | | | | nvkm_volt_map_min is a copy of nvkm_volt_map, which always returns the lowest possible voltage for a cstate. nvkm_volt_map will get a temperature parameter there later and also fix the voltage calculation, so that this functions will be completly different later. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt: Properly detect entry based voltage tablesKarol Herbst2016-11-041-2/+3
| | | | | | | | | | | | | There is a field in the voltage table which tells us if the VIDs are taken from the entries or calculated through the header. v2: Don't break older versions. v5: Reverse flag name. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* iccsense: Parse the resistors and config the right wayKarol Herbst2016-11-041-2/+8
| | | | | | | | | | | | | | Previously we parsed that table a bit wrong: 1. The entry layout depends on the sensor type used. 2. We have all resitors in one entry for the INA3221. 3. The config is already included in the vbios. This commit addresses that issue and with that we should be able to read out the right power consumption for every GPU with a INA209, INA219 and INA3221. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* Revert "bus: remove cpu_coherent flag"Karol Herbst2016-09-221-0/+1
| | | | | | | | | | | | | This reverts commit 01bbcb69f80e1058395b737ae399c6f4ef48691b. The commit caused fence timeouts within nvc0_screen_destroy and most likely other places as well. The most obvious effect is, that userspace processes take minutes to actually quit. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bus: remove cpu_coherent flagAlexandre Courbot2016-07-141-1/+0
| | | | | | | | | | | | | | | This flag's only remaining function is to ignore the uncached flag for BOs on coherent architectures. However the reason for allocating an object uncache on a non-coherent architecture (namely because the cost of doing explicit flushes/ invalidations is higher than the benefit of caching the data because accesses are few and far between) should also apply on architectures for which coherency is maintained implicitly. Thus allocate coherent objects as uncached on all architectures. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ce/gp104: initial supportBen Skeggs2016-07-142-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp/gp104: initial supportBen Skeggs2016-07-142-0/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fb/gp104: initial supportBen Skeggs2016-07-141-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gp100: initial supportBen Skeggs2016-07-142-0/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ce/gp100: initial supportBen Skeggs2016-07-142-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gp100: initial supportBen Skeggs2016-07-142-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp/gp100: initial supportBen Skeggs2016-07-142-0/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ltc/gp100: initial supportBen Skeggs2016-07-141-0/+1
| | | | | | | | Due to the GPU preventing us from touching NV_PLTCG_LTCS_LTSS_CBC_BASE, we cannot provide CBC/ZBC support without signed PMU firmware to handle the task for us... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fb/gp100: initial supportBen Skeggs2016-07-141-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci/gp100: initial supportBen Skeggs2016-07-141-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc/gp100: initial supportBen Skeggs2016-07-141-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: recognise GP100 chipsetBen Skeggs2016-07-142-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: increase maximum nvenc instances to 3Ben Skeggs2016-07-141-3/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: increase maximum ce instances to 6Ben Skeggs2016-07-141-3/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fb/gf100-: allow selection of an alternate big page sizeBen Skeggs2016-07-141-0/+2
| | | | | | | | | | | | | GFxxx/GM1xx support the selection of 64/128KiB big pages globally. GM2xx supports the same, as well as another mode where the page size can be selected per-instance. We default to 128KiB pages (With per-instance for GM200, but the current code selects 128KiB there already) as the MMU code isn't currently able to handle otherwise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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