1 files changed, 145 insertions, 0 deletions
diff --git a/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg b/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg
new file mode 100644
index 0000000..ebaf87e
--- /dev/null
+++ b/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg
@@ -0,0 +1,145 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+BlockSize     = 0x00004000;
+PageSize      = 0x00000200;
+PartitionSize = 0x01000000;
+OdmData       = 0x300d8000;
+
+DevType[0] = NvBootDevType_Sdmmc;
+DeviceParam[0].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[0].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+DevType[1] = NvBootDevType_Sdmmc;
+DeviceParam[1].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[1].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+DevType[2] = NvBootDevType_Sdmmc;
+DeviceParam[2].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[2].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+DevType[3] = NvBootDevType_Sdmmc;
+DeviceParam[3].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[3].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+SDRAM[0].MemoryType                 = NvBootMemoryType_LpDdr2;
+SDRAM[0].PllMChargePumpSetupControl = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl = 0x00000000;
+SDRAM[0].PllMInputDivider           = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider        = 0x00000258;
+SDRAM[0].PllMPostDivider            = 0x00000000;
+SDRAM[0].PllMStableTime             = 0x0000012c;
+SDRAM[0].EmcClockDivider            = 0x00000001;
+SDRAM[0].EmcAutoCalInterval         = 0x00000000;
+SDRAM[0].EmcAutoCalConfig           = 0xe0a61111;
+SDRAM[0].EmcAutoCalWait             = 0x00000000;
+SDRAM[0].EmcPinProgramWait          = 0x00000000;
+SDRAM[0].EmcRc                      = 0x00000012;
+SDRAM[0].EmcRfc                     = 0x00000027;
+SDRAM[0].EmcRas                     = 0x0000000d;
+SDRAM[0].EmcRp                      = 0x00000007;
+SDRAM[0].EmcR2w                     = 0x00000007;
+SDRAM[0].EmcW2r                     = 0x00000005;
+SDRAM[0].EmcR2p                     = 0x00000003;
+SDRAM[0].EmcW2p                     = 0x00000009;
+SDRAM[0].EmcRrd                     = 0x00000003;
+SDRAM[0].EmcRdRcd                   = 0x00000006;
+SDRAM[0].EmcWrRcd                   = 0x00000006;
+SDRAM[0].EmcRext                    = 0x00000003;
+SDRAM[0].EmcWdv                     = 0x00000002;
+SDRAM[0].EmcQUseExtra               = 0x00000005;
+SDRAM[0].EmcQUse                    = 0x00000006;
+SDRAM[0].EmcQRst                    = 0x00000003;
+SDRAM[0].EmcQSafe                   = 0x00000009;
+SDRAM[0].EmcRdv                     = 0x0000000c;
+SDRAM[0].EmcRefresh                 = 0x0000045f;
+SDRAM[0].EmcBurstRefreshNum         = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                 = 0x00000004;
+SDRAM[0].EmcPdEx2Rd                 = 0x00000004;
+SDRAM[0].EmcPChg2Pden               = 0x00000007;
+SDRAM[0].EmcAct2Pden                = 0x00000006;
+SDRAM[0].EmcAr2Pden                 = 0x00000001;
+SDRAM[0].EmcRw2Pden                 = 0x0000000e;
+SDRAM[0].EmcTxsr                    = 0x0000002a;
+SDRAM[0].EmcTcke                    = 0x00000003;
+SDRAM[0].EmcTfaw                    = 0x0000000f;
+SDRAM[0].EmcTrpab                   = 0x00000008;
+SDRAM[0].EmcTClkStable              = 0x00000005;
+SDRAM[0].EmcTClkStop                = 0x00000002;
+SDRAM[0].EmcTRefBw                  = 0x000004e0;
+SDRAM[0].EmcFbioCfg1                = 0x00000000;
+SDRAM[0].EmcFbioDqsibDlyMsb         = 0x00000000;
+SDRAM[0].EmcFbioDqsibDly            = 0x383c443c;
+SDRAM[0].EmcFbioQuseDlyMsb          = 0x00000000;
+SDRAM[0].EmcFbioQuseDly             = 0x6e6e6e6e;
+SDRAM[0].EmcFbioCfg5                = 0x00000282;
+SDRAM[0].EmcFbioCfg6                = 0x00000002;
+SDRAM[0].EmcFbioSpare               = 0x00000000;
+SDRAM[0].EmcMrsResetDllWait         = 0x00000000;
+SDRAM[0].EmcMrsResetDll             = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset         = 0x00000000;
+SDRAM[0].EmcMrs                     = 0x00000000;
+SDRAM[0].EmcEmrsEmr2                = 0x00000000;
+SDRAM[0].EmcEmrsEmr3                = 0x00000000;
+SDRAM[0].EmcEmrsDdr2DllEnable       = 0x00000000;
+SDRAM[0].EmcEmrsDdr2OcdCalib        = 0x00000000;
+SDRAM[0].EmcEmrs                    = 0x00000000;
+SDRAM[0].EmcMrw1                    = 0x0001006a;
+SDRAM[0].EmcMrw2                    = 0x00020003;
+SDRAM[0].EmcMrw3                    = 0x00030002;
+SDRAM[0].EmcMrwResetCommand         = 0x003f0000;
+SDRAM[0].EmcMrwResetNInitWait       = 0x0000000a;
+SDRAM[0].EmcAdrCfg1                 = 0x00070303;
+SDRAM[0].EmcAdrCfg                  = 0x01070303;
+SDRAM[0].McEmemCfg                  = 0x00100000;
+SDRAM[0].McLowLatencyConfig         = 0x80000003;
+SDRAM[0].EmcCfg2                    = 0x00000403;
+SDRAM[0].EmcCfgDigDll               = 0xe0000313;
+SDRAM[0].EmcCfgClktrim0             = 0x00000000;
+SDRAM[0].EmcCfgClktrim1             = 0x00000000;
+SDRAM[0].EmcCfgClktrim2             = 0x00000000;
+SDRAM[0].EmcCfg                     = 0x0001ff00;
+SDRAM[0].EmcDbg                     = 0x01000020;
+SDRAM[0].AhbArbitrationXbarCtrl     = 0x00010000;
+SDRAM[0].EmcDllXformDqs             = 0x00000010;
+SDRAM[0].EmcDllXformQUse            = 0x00000008;
+SDRAM[0].WarmBootWait               = 0x00000001;
+SDRAM[0].EmcCttTermCtrl             = 0x00000802;
+SDRAM[0].EmcOdtWrite                = 0x00000000;
+SDRAM[0].EmcOdtRead                 = 0x00000000;
+SDRAM[0].EmcZcalRefCnt              = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt             = 0x0000001b;
+SDRAM[0].EmcZcalMrwCmd              = 0x000a0056;
+SDRAM[0].EmcMrwZqInitDev0           = 0x800a00ff;
+SDRAM[0].EmcMrwZqInitDev1           = 0x400a00ff;
+SDRAM[0].EmcMrwZqInitWait           = 0x00000001;
+SDRAM[0].EmcDdr2Wait                = 0x00000000;
+SDRAM[0].PmcDdrPwr                  = 0x00000000;
+SDRAM[0].ApbMiscGpXm2CfgAPadCtrl    = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2   = 0x08080040;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl    = 0x77fffff8;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2   = 0x44440000;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl    = 0x77fffff8;
+SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl  = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CompPadCtrl    = 0x01f1f008;
+SDRAM[0].ApbMiscGpXm2VttGenPadCtrl  = 0x00005500;