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author | Stephen Warren <swarren@nvidia.com> | 2014-08-22 14:56:33 -0600 |
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committer | Stephen Warren <swarren@nvidia.com> | 2014-08-22 15:01:50 -0600 |
commit | 5187a2774979b95fea91ddbbd2d5fc5f2ebc64c8 (patch) | |
tree | 6a0b1f8751350733feb5e06f9be2075202b65c83 | |
parent | 7177283483479405a5f9b4406ce4dde5e813fd8d (diff) | |
download | tegra-pinmux-scripts-5187a2774979b95fea91ddbbd2d5fc5f2ebc64c8.tar.gz |
Jetson TK1: add missing PCIe-related pin configuration
The Jetson TK1 spreadsheet is missing configuration for the PCIe clk_req,
rst, and wake pins. This causes the generated pinmux tables to also omit
any configuration for these pins, which in turn causes U-Boot's and the
Linux Kernel's PCIe support to fail.
Manually add configuration for these pins. The values here match the
values found in the downstream L4T kernel, and common sense based on the
usage of these pins.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r-- | configs/jetson-tk1.board | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/configs/jetson-tk1.board b/configs/jetson-tk1.board index 1df6284..f69b89e 100644 --- a/configs/jetson-tk1.board +++ b/configs/jetson-tk1.board @@ -89,6 +89,11 @@ pins = ( ('pi7', 'rsvd1', None, 'down', True, False, False, False), ('pc7', None, 'in', 'up', False, True, False, False), ('pi0', None, 'out0', 'none', False, False, False, False), + ('pex_l0_clkreq_n_pdd2', 'pe0', None, 'up', False, True, False, False), + ('pex_l0_rst_n_pdd1', 'pe0', None, 'none', False, False, False, False), + ('pex_l1_clkreq_n_pdd6', 'pe1', None, 'up', False, True, False, False), + ('pex_l1_rst_n_pdd5', 'pe1', None, 'none', False, False, False, False), + ('pex_wake_n_pdd3', 'pe', None, 'up', False, True, False, False), ('usb_vbus_en2_pff1', None, 'out0', 'none', False, False, False, False), ('pff2', None, 'in', 'up', False, True, False, False), ('clk2_out_pw5', 'extperiph2', None, 'none', False, False, False, False), |