diff options
| author | Stephen Warren <swarren@nvidia.com> | 2014-03-06 13:06:31 -0700 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2014-04-22 16:18:35 -0600 |
| commit | 2577ab08c5a84229580c83a0cd00a03328eba89b (patch) | |
| tree | ad04beb34ad4e3f65564316b6a9d8ac585298095 /configs | |
| parent | 16495973b3f18b575ed20773c788be642ffceb63 (diff) | |
| download | tegra-pinmux-scripts-2577ab08c5a84229580c83a0cd00a03328eba89b.tar.gz | |
Initial set of scripts
A set of scripts to generate Linux kernel and U-Boot pinmux drivers and
board pinmux configuration tables. Also included are scripts to convert
existing Linux kernel pinmux drivers and NV-internal spreadsheets to the
internal data representation.
SoC configuration files are included for Tegra30, Tegra114, and Tegra124.
Board configuration files are included for Jetson TK1 and Venice2.
configs/tegra30.soc
configs/tegra114.soc
configs/tegra124.soc
SoC pin definitions
configs/jetson-tk1.board
configs/venice2.board
Board configurations
soc-to-kernel-pinctrl-driver.py
soc-to-uboot-driver.py
Generate Linux kernel and U-Boot pinmux drivers
board-to-kernel-dt.py
board-to-uboot.py
Generate board configuration tables for the Linux kernel (DT) and
U-Boot.
kernel-pinctrl-driver-to-soc.py
Convert an existing Linux kernel pinmux driver to the internal
representation of an SoC used by this project.
csv-to-board-tegra124-xlsx.py
Convert an NV-internal board configuration spreadsheet to the
internal representation of a board configuration used by this
project.
tegra_pmx_board_parser.py
tegra_pmx_parser_utils.py
tegra_pmx_soc_parser.py
tegra_pmx_utils.py
Internal Python modules used to parse the internal data
representations, and various other utilities.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/jetson-tk1.board | 193 | ||||
| -rw-r--r-- | configs/tegra114.soc | 496 | ||||
| -rw-r--r-- | configs/tegra124.soc | 526 | ||||
| -rw-r--r-- | configs/tegra30.soc | 660 | ||||
| -rw-r--r-- | configs/venice2.board | 198 |
5 files changed, 2073 insertions, 0 deletions
diff --git a/configs/jetson-tk1.board b/configs/jetson-tk1.board new file mode 100644 index 0000000..1df6284 --- /dev/null +++ b/configs/jetson-tk1.board @@ -0,0 +1,193 @@ +soc = 'tegra124' + +pins = ( + #pin, mux, gpio_init, pull, tri, e_inp, od, rcv_sel + ('dap_mclk1_pw4', 'extperiph1', None, 'none', False, False, False, False), + ('dap_mclk1_req_pee2', 'sata', None, 'none', False, False, False, False), + ('dap1_din_pn1', 'i2s0', None, 'down', False, True, False, False), + ('dap1_dout_pn2', 'sata', None, 'none', False, False, False, False), + ('dap1_fs_pn0', 'i2s0', None, 'down', False, True, False, False), + ('dap1_sclk_pn3', 'i2s0', None, 'down', False, True, False, False), + ('dap2_din_pa4', 'i2s1', None, 'none', False, True, False, False), + ('dap2_dout_pa5', 'i2s1', None, 'none', False, True, False, False), + ('dap2_fs_pa2', 'i2s1', None, 'none', False, True, False, False), + ('dap2_sclk_pa3', 'i2s1', None, 'none', False, True, False, False), + ('gpio_x4_aud_px4', None, 'out0', 'none', False, False, False, False), + ('gpio_x5_aud_px5', None, 'in', 'up', False, True, False, False), + ('gpio_x6_aud_px6', None, 'in', 'up', False, True, False, False), + ('gpio_x7_aud_px7', None, 'out0', 'none', False, False, False, False), + ('gpio_w2_aud_pw2', None, 'in', 'up', False, True, False, False), + ('gpio_w3_aud_pw3', None, 'in', 'up', False, True, False, False), + ('dvfs_pwm_px0', 'cldvfs', None, 'none', False, False, False, False), + ('gpio_x1_aud_px1', None, 'out0', 'none', False, False, False, False), + ('dvfs_clk_px2', 'cldvfs', None, 'none', False, False, False, False), + ('gpio_x3_aud_px3', None, 'in', 'up', False, True, False, False), + ('dap3_din_pp1', None, 'out0', 'none', False, False, False, False), + ('dap3_dout_pp2', None, 'out0', 'none', False, False, False, False), + ('dap3_fs_pp0', None, 'out0', 'none', False, False, False, False), + ('dap3_sclk_pp3', 'rsvd3', None, 'down', True, False, False, False), + ('pv0', None, 'in', 'up', False, True, False, False), + ('pv1', None, 'in', 'up', False, True, False, False), + ('ulpi_clk_py0', 'spi1', None, 'none', False, False, False, False), + ('ulpi_data0_po1', None, 'in', 'up', False, True, False, False), + ('ulpi_data1_po2', None, 'in', 'up', False, True, False, False), + ('ulpi_data2_po3', None, 'in', 'up', False, True, False, False), + ('ulpi_data3_po4', None, 'in', 'up', False, True, False, False), + ('ulpi_data4_po5', None, 'in', 'up', False, True, False, False), + ('ulpi_data5_po6', None, 'out0', 'none', False, False, False, False), + ('ulpi_data6_po7', None, 'in', 'up', False, True, False, False), + ('ulpi_data7_po0', None, 'in', 'up', False, True, False, False), + ('ulpi_dir_py1', 'spi1', None, 'down', False, True, False, False), + ('ulpi_nxt_py2', 'spi1', None, 'none', False, False, False, False), + ('ulpi_stp_py3', 'spi1', None, 'none', False, False, False, False), + ('cam_i2c_scl_pbb1', 'i2c3', None, 'none', False, True, True, False), + ('cam_i2c_sda_pbb2', 'i2c3', None, 'none', False, True, True, False), + ('cam_mclk_pcc0', 'vi_alt3', None, 'none', False, False, False, False), + ('pbb0', 'vimclk2_alt', None, 'none', False, False, False, False), + ('pbb3', None, 'out0', 'none', False, False, False, False), + ('pbb4', 'vgp4', None, 'none', False, False, False, False), + ('pbb5', None, 'out0', 'none', False, False, False, False), + ('pbb6', None, 'out0', 'none', False, False, False, False), + ('pbb7', None, 'out0', 'none', False, False, False, False), + ('pcc1', None, 'in', 'down', False, True, False, False), + ('pcc2', None, 'in', 'down', False, True, False, False), + ('gen2_i2c_scl_pt5', 'i2c2', None, 'none', False, True, True, False), + ('gen2_i2c_sda_pt6', 'i2c2', None, 'none', False, True, True, False), + ('pj7', 'uartd', None, 'none', False, False, False, False), + ('pb0', 'uartd', None, 'up', False, True, False, False), + ('pb1', 'uartd', None, 'up', False, True, False, False), + ('pk7', 'uartd', None, 'none', False, False, False, False), + ('pg0', None, 'out0', 'none', False, False, False, False), + ('pg1', None, 'out0', 'none', False, False, False, False), + ('ph2', None, 'out0', 'none', False, False, False, False), + ('ph3', None, 'out0', 'none', False, False, False, False), + ('ph4', None, 'in', 'up', False, True, False, False), + ('ph5', None, 'out0', 'none', False, False, False, False), + ('ph6', None, 'in', 'up', False, True, False, False), + ('ph7', None, 'out0', 'none', False, False, False, False), + ('pg2', None, 'in', 'down', False, True, False, False), + ('pg3', None, 'in', 'down', False, True, False, False), + ('pg4', 'spi4', None, 'none', False, False, False, False), + ('pg5', 'spi4', None, 'none', False, False, False, False), + ('pg6', 'spi4', None, 'none', False, False, False, False), + ('pg7', 'spi4', None, 'none', False, True, False, False), + ('ph0', 'gmi', None, 'down', True, False, False, False), + ('ph1', 'pwm1', None, 'none', False, False, False, False), + ('pk0', 'soc', None, 'up', False, True, False, False), + ('pk1', None, 'out0', 'none', False, False, False, False), + ('pj0', None, 'in', 'up', False, True, False, False), + ('pj2', None, 'in', 'up', False, True, False, False), + ('pk3', None, 'in', 'up', False, True, False, False), + ('pk4', None, 'out0', 'none', False, False, False, False), + ('pk2', None, 'in', 'up', False, True, False, False), + ('pi3', 'spi4', None, 'none', False, False, False, False), + ('pi6', None, 'in', 'up', False, True, False, False), + ('pi2', None, 'out0', 'none', False, False, False, False), + ('pi5', None, 'in', 'up', False, True, False, False), + ('pi1', 'rsvd1', None, 'down', True, False, False, False), + ('pi4', None, 'out0', 'none', False, False, False, False), + ('pi7', 'rsvd1', None, 'down', True, False, False, False), + ('pc7', None, 'in', 'up', False, True, False, False), + ('pi0', None, 'out0', 'none', False, False, False, False), + ('usb_vbus_en2_pff1', None, 'out0', 'none', False, False, False, False), + ('pff2', None, 'in', 'up', False, True, False, False), + ('clk2_out_pw5', 'extperiph2', None, 'none', False, False, False, False), + ('clk2_req_pcc5', None, 'out0', 'none', False, False, False, False), + ('sdmmc1_wp_n_pv3', 'sdmmc1', None, 'down', True, False, False, False), + ('sdmmc1_clk_pz0', 'sdmmc1', None, 'none', False, True, False, False), + ('sdmmc1_cmd_pz1', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat0_py7', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat1_py6', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat2_py5', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat3_py4', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc3_clk_pa6', 'sdmmc3', None, 'none', False, False, False, False), + ('sdmmc3_cmd_pa7', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat0_pb7', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat1_pb6', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat2_pb5', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat3_pb4', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_clk_lb_out_pee4', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_clk_lb_in_pee5', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc4_clk_pcc4', 'sdmmc4', None, 'none', False, True, False, False), + ('sdmmc4_cmd_pt7', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat0_paa0', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat1_paa1', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat2_paa2', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat3_paa3', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat4_paa4', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat5_paa5', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat6_paa6', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat7_paa7', 'sdmmc4', None, 'up', False, True, False, False), + ('kb_col0_pq0', None, 'in', 'up', False, True, False, False), + ('kb_col1_pq1', None, 'in', 'up', False, True, False, False), + ('kb_col2_pq2', None, 'in', 'up', False, True, False, False), + ('kb_col3_pq3', 'kbc', None, 'down', True, False, False, False), + ('kb_col4_pq4', 'sdmmc3', None, 'up', False, True, False, False), + ('kb_col5_pq5', None, 'in', 'up', False, True, False, False), + ('kb_col6_pq6', None, 'in', 'up', False, True, False, False), + ('kb_col7_pq7', None, 'in', 'up', False, True, False, False), + ('kb_row0_pr0', None, 'out0', 'none', False, False, False, False), + ('kb_row1_pr1', None, 'out0', 'none', False, False, False, False), + ('kb_row10_ps2', 'rsvd2', None, 'up', False, True, False, False), + ('kb_row11_ps3', None, 'out0', 'none', False, False, False, False), + ('kb_row12_ps4', None, 'out0', 'none', False, False, False, False), + ('kb_row13_ps5', None, 'in', 'up', False, True, False, False), + ('kb_row14_ps6', None, 'out0', 'none', False, False, False, False), + ('kb_row15_ps7', 'soc', None, 'up', False, True, False, False), + ('kb_row16_pt0', None, 'out0', 'none', False, False, False, False), + ('kb_row17_pt1', None, 'out0', 'none', False, False, False, False), + ('kb_row2_pr2', None, 'out0', 'none', False, False, False, False), + ('kb_row3_pr3', 'sys', None, 'none', False, False, False, False), + ('kb_row4_pr4', None, 'in', 'up', False, True, False, False), + ('kb_row5_pr5', None, 'out0', 'none', False, False, False, False), + ('kb_row6_pr6', 'displaya_alt', None, 'down', False, True, False, False), + ('kb_row7_pr7', None, 'in', 'up', False, True, False, False), + ('kb_row8_ps0', None, 'in', 'up', False, True, False, False), + ('kb_row9_ps1', 'rsvd2', None, 'none', False, False, False, False), + ('sdmmc3_cd_n_pv2', 'sdmmc3', None, 'up', False, True, False, False), + ('clk_32k_out_pa0', 'soc', None, 'up', False, True, False, False), + ('pwr_i2c_scl_pz6', 'i2cpwr', None, 'none', False, True, True, False), + ('pwr_i2c_sda_pz7', 'i2cpwr', None, 'none', False, True, True, False), + ('jtag_rtck', 'rtck', None, 'up', False, False, False, False), + ('clk_32k_in', 'rsvd2', None, 'none', False, True, False, False), + ('core_pwr_req', 'pwron', None, 'none', False, False, False, False), + ('cpu_pwr_req', 'rsvd2', None, 'none', False, False, False, False), + ('pwr_int_n', 'pmi', None, 'up', False, True, False, False), + ('reset_out_n', 'reset_out_n', None, 'none', False, False, False, False), + ('clk3_out_pee0', 'extperiph3', None, 'none', False, False, False, False), + ('clk3_req_pee1', None, 'out0', 'none', False, False, False, False), + ('dap4_din_pp5', 'i2s3', None, 'down', False, True, False, False), + ('dap4_dout_pp6', 'i2s3', None, 'down', False, True, False, False), + ('dap4_fs_pp4', 'i2s3', None, 'down', False, True, False, False), + ('dap4_sclk_pp7', 'i2s3', None, 'down', False, True, False, False), + ('gen1_i2c_scl_pc4', 'i2c1', None, 'none', False, True, True, False), + ('gen1_i2c_sda_pc5', 'i2c1', None, 'none', False, True, True, False), + ('pu0', None, 'out0', 'none', False, False, False, False), + ('pu1', None, 'in', 'down', False, True, False, False), + ('pu2', None, 'in', 'down', False, True, False, False), + ('pu3', None, 'out0', 'none', False, False, False, False), + ('pu4', None, 'out0', 'none', False, False, False, False), + ('pu5', None, 'in', 'up', False, True, False, False), + ('pu6', None, 'in', 'up', False, True, False, False), + ('uart2_cts_n_pj5', 'uartb', None, 'up', False, True, False, False), + ('uart2_rts_n_pj6', 'uartb', None, 'none', False, False, False, False), + ('uart2_rxd_pc3', 'irda', None, 'up', False, True, False, False), + ('uart2_txd_pc2', 'irda', None, 'none', False, False, False, False), + ('uart3_cts_n_pa1', 'uartc', None, 'up', False, True, False, False), + ('uart3_rts_n_pc0', 'uartc', None, 'none', False, False, False, False), + ('uart3_rxd_pw7', 'uartc', None, 'up', False, True, False, False), + ('uart3_txd_pw6', 'uartc', None, 'none', False, False, False, False), + ('owr', 'rsvd2', None, 'down', True, False, False, False), + ('hdmi_cec_pee3', 'cec', None, 'none', False, True, True, False), + ('hdmi_int_pn7', None, 'in', 'down', False, True, False, False), + ('ddc_scl_pv4', 'i2c4', None, 'none', False, True, False, False), + ('ddc_sda_pv5', 'i2c4', None, 'none', False, True, False, False), + ('spdif_out_pk5', None, 'out0', 'none', False, False, False, False), + ('spdif_in_pk6', None, 'out0', 'none', False, False, False, False), + ('usb_vbus_en0_pn4', 'usb', None, 'up', False, True, True, False), + ('usb_vbus_en1_pn5', 'usb', None, 'up', False, True, True, False), + ('dp_hpd_pff0', 'dp', None, 'up', False, True, False, False), +) + +drive_groups = ( +) diff --git a/configs/tegra114.soc b/configs/tegra114.soc new file mode 100644 index 0000000..92ee4e7 --- /dev/null +++ b/configs/tegra114.soc @@ -0,0 +1,496 @@ +# All data validated against Tegra114 TRM on 2014/03/13 by swarren except: +# - drive_group_pins[] content + +kernel_copyright_years = '2012-2013' +kernel_author = 'Pritesh Raithatha <praithatha@nvidia.com>' +uboot_copyright_years = '2010-2014' + +gpios = ( + #name, gpio, reg, f0, f1, f2, f3, od, ior, rcv_sel + ('clk_32k_out', 'a0', 0x331c, 'blink', 'soc', 'rsvd3', 'rsvd4', False, False, False), + ('uart3_cts_n', 'a1', 0x317c, 'uartc', 'sdmmc1', 'dtv', 'spi4', False, False, False), + ('dap2_fs', 'a2', 0x3358, 'i2s1', 'hda', 'rsvd3', 'rsvd4', False, False, False), + ('dap2_sclk', 'a3', 0x3364, 'i2s1', 'hda', 'rsvd3', 'rsvd4', False, False, False), + ('dap2_din', 'a4', 0x335c, 'i2s1', 'hda', 'rsvd3', 'rsvd4', False, False, False), + ('dap2_dout', 'a5', 0x3360, 'i2s1', 'hda', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc3_clk', 'a6', 0x3390, 'sdmmc3', 'rsvd2', 'rsvd3', 'spi3', False, False, False), + ('sdmmc3_cmd', 'a7', 0x3394, 'sdmmc3', 'pwm3', 'uarta', 'spi3', False, False, False), + ('gmi_a17', 'b0', 0x3234, 'uartd', 'rsvd2', 'gmi', 'trace', False, False, False), + ('gmi_a18', 'b1', 0x3238, 'uartd', 'rsvd2', 'gmi', 'trace', False, False, False), + ('sdmmc3_dat3', 'b4', 0x33a4, 'sdmmc3', 'pwm0', 'displayb', 'spi3', False, False, False), + ('sdmmc3_dat2', 'b5', 0x33a0, 'sdmmc3', 'pwm1', 'displaya', 'spi3', False, False, False), + ('sdmmc3_dat1', 'b6', 0x339c, 'sdmmc3', 'pwm2', 'uarta', 'spi3', False, False, False), + ('sdmmc3_dat0', 'b7', 0x3398, 'sdmmc3', 'rsvd2', 'rsvd3', 'spi3', False, False, False), + ('uart3_rts_n', 'c0', 0x3180, 'uartc', 'pwm0', 'dtv', 'displaya', False, False, False), + ('uart2_txd', 'c2', 0x3168, 'irda', 'spdif', 'uarta', 'spi4', False, False, False), + ('uart2_rxd', 'c3', 0x3164, 'irda', 'spdif', 'uarta', 'spi4', False, False, False), + ('gen1_i2c_scl', 'c4', 0x31a4, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('gen1_i2c_sda', 'c5', 0x31a0, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('gmi_wp_n', 'c7', 0x31c0, 'rsvd1', 'nand', 'gmi', 'gmi_alt', False, False, False), + ('gmi_ad0', 'g0', 0x31f0, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False, False), + ('gmi_ad1', 'g1', 0x31f4, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False, False), + ('gmi_ad2', 'g2', 0x31f8, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False, False), + ('gmi_ad3', 'g3', 0x31fc, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False, False), + ('gmi_ad4', 'g4', 0x3200, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False, False), + ('gmi_ad5', 'g5', 0x3204, 'rsvd1', 'nand', 'gmi', 'spi4', False, False, False), + ('gmi_ad6', 'g6', 0x3208, 'rsvd1', 'nand', 'gmi', 'spi4', False, False, False), + ('gmi_ad7', 'g7', 0x320c, 'rsvd1', 'nand', 'gmi', 'spi4', False, False, False), + ('gmi_ad8', 'h0', 0x3210, 'pwm0', 'nand', 'gmi', 'dtv', False, False, False), + ('gmi_ad9', 'h1', 0x3214, 'pwm1', 'nand', 'gmi', 'cldvfs', False, False, False), + ('gmi_ad10', 'h2', 0x3218, 'pwm2', 'nand', 'gmi', 'cldvfs', False, False, False), + ('gmi_ad11', 'h3', 0x321c, 'pwm3', 'nand', 'gmi', 'usb', False, False, False), + ('gmi_ad12', 'h4', 0x3220, 'sdmmc2', 'nand', 'gmi', 'rsvd4', False, False, False), + ('gmi_ad13', 'h5', 0x3224, 'sdmmc2', 'nand', 'gmi', 'rsvd4', False, False, False), + ('gmi_ad14', 'h6', 0x3228, 'sdmmc2', 'nand', 'gmi', 'dtv', False, False, False), + ('gmi_ad15', 'h7', 0x322c, 'sdmmc2', 'nand', 'gmi', 'dtv', False, False, False), + ('gmi_wr_n', 'i0', 0x3240, 'rsvd1', 'nand', 'gmi', 'spi4', False, False, False), + ('gmi_oe_n', 'i1', 0x3244, 'rsvd1', 'nand', 'gmi', 'soc', False, False, False), + ('gmi_cs6_n', 'i3', 0x31e8, 'nand', 'nand_alt', 'gmi', 'spi4', False, False, False), + ('gmi_rst_n', 'i4', 0x324c, 'nand', 'nand_alt', 'gmi', 'rsvd4', False, False, False), + ('gmi_iordy', 'i5', 0x31c4, 'sdmmc2', 'rsvd2', 'gmi', 'trace', False, False, False), + ('gmi_cs7_n', 'i6', 0x31ec, 'nand', 'nand_alt', 'gmi', 'sdmmc2', False, False, False), + ('gmi_wait', 'i7', 0x31c8, 'spi4', 'nand', 'gmi', 'dtv', False, False, False), + ('gmi_cs0_n', 'j0', 0x31d4, 'rsvd1', 'nand', 'gmi', 'usb', False, False, False), + ('gmi_cs1_n', 'j2', 0x31d8, 'rsvd1', 'nand', 'gmi', 'soc', False, False, False), + ('gmi_dqs_p', 'j3', 0x3248, 'sdmmc2', 'nand', 'gmi', 'trace', False, False, False), + ('uart2_cts_n', 'j5', 0x3170, 'uarta', 'uartb', 'rsvd3', 'spi4', False, False, False), + ('uart2_rts_n', 'j6', 0x316c, 'uarta', 'uartb', 'rsvd3', 'spi4', False, False, False), + ('gmi_a16', 'j7', 0x3230, 'uartd', 'trace', 'gmi', 'gmi_alt', False, False, False), + ('gmi_adv_n', 'k0', 0x31cc, 'rsvd1', 'nand', 'gmi', 'trace', False, False, False), + ('gmi_clk', 'k1', 0x31d0, 'sdmmc2', 'nand', 'gmi', 'trace', False, False, False), + ('gmi_cs4_n', 'k2', 0x31e4, 'usb', 'nand', 'gmi', 'trace', False, False, False), + ('gmi_cs2_n', 'k3', 0x31dc, 'sdmmc2', 'nand', 'gmi', 'trace', False, False, False), + ('gmi_cs3_n', 'k4', 0x31e0, 'sdmmc2', 'nand', 'gmi', 'gmi_alt', False, False, False), + ('spdif_out', 'k5', 0x3354, 'spdif', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('spdif_in', 'k6', 0x3350, 'spdif', 'usb', 'rsvd3', 'rsvd4', False, False, False), + ('gmi_a19', 'k7', 0x323c, 'uartd', 'spi4', 'gmi', 'trace', False, False, False), + ('dap1_fs', 'n0', 0x3338, 'i2s0', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap1_din', 'n1', 0x333c, 'i2s0', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap1_dout', 'n2', 0x3340, 'i2s0', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap1_sclk', 'n3', 0x3344, 'i2s0', 'hda', 'gmi', 'rsvd4', False, False, False), + ('usb_vbus_en0', 'n4', 0x33f4, 'usb', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('usb_vbus_en1', 'n5', 0x33f8, 'usb', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('hdmi_int', 'n7', 0x3110, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + ('ulpi_data7', 'o0', 0x301c, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data0', 'o1', 0x3000, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data1', 'o2', 0x3004, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data2', 'o3', 0x3008, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data3', 'o4', 0x300c, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data4', 'o5', 0x3010, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data5', 'o6', 0x3014, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data6', 'o7', 0x3018, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('dap3_fs', 'p0', 0x3030, 'i2s2', 'spi5', 'displaya', 'displayb', False, False, False), + ('dap3_din', 'p1', 0x3034, 'i2s2', 'spi5', 'displaya', 'displayb', False, False, False), + ('dap3_dout', 'p2', 0x3038, 'i2s2', 'spi5', 'displaya', 'displayb', False, False, False), + ('dap3_sclk', 'p3', 0x303c, 'i2s2', 'spi5', 'displaya', 'displayb', False, False, False), + ('dap4_fs', 'p4', 0x31a8, 'i2s3', 'rsvd2', 'dtv', 'rsvd4', False, False, False), + ('dap4_din', 'p5', 0x31ac, 'i2s3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('dap4_dout', 'p6', 0x31b0, 'i2s3', 'rsvd2', 'dtv', 'rsvd4', False, False, False), + ('dap4_sclk', 'p7', 0x31b4, 'i2s3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('kb_col0', 'q0', 0x32fc, 'kbc', 'usb', 'spi2', 'emc_dll', False, False, False), + ('kb_col1', 'q1', 0x3300, 'kbc', 'rsvd2', 'spi2', 'emc_dll', False, False, False), + ('kb_col2', 'q2', 0x3304, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_col3', 'q3', 0x3308, 'kbc', 'displaya', 'pwm2', 'uarta', False, False, False), + ('kb_col4', 'q4', 0x330c, 'kbc', 'owr', 'sdmmc3', 'uarta', False, False, False), + ('kb_col5', 'q5', 0x3310, 'kbc', 'rsvd2', 'sdmmc1', 'rsvd4', False, False, False), + ('kb_col6', 'q6', 0x3314, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_col7', 'q7', 0x3318, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_row0', 'r0', 0x32bc, 'kbc', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('kb_row1', 'r1', 0x32c0, 'kbc', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('kb_row2', 'r2', 0x32c4, 'kbc', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('kb_row3', 'r3', 0x32c8, 'kbc', 'displaya', 'rsvd3', 'displayb', False, False, False), + ('kb_row4', 'r4', 0x32cc, 'kbc', 'displaya', 'spi2', 'displayb', False, False, False), + ('kb_row5', 'r5', 0x32d0, 'kbc', 'displaya', 'spi2', 'displayb', False, False, False), + ('kb_row6', 'r6', 0x32d4, 'kbc', 'displaya', 'displaya_alt', 'displayb', False, False, False), + ('kb_row7', 'r7', 0x32d8, 'kbc', 'rsvd2', 'cldvfs', 'uarta', False, False, False), + ('kb_row8', 's0', 0x32dc, 'kbc', 'rsvd2', 'cldvfs', 'uarta', False, False, False), + ('kb_row9', 's1', 0x32e0, 'kbc', 'rsvd2', 'rsvd3', 'uarta', False, False, False), + ('kb_row10', 's2', 0x32e4, 'kbc', 'rsvd2', 'rsvd3', 'uarta', False, False, False), + ('gen2_i2c_scl', 't5', 0x3250, 'i2c2', 'rsvd2', 'gmi', 'rsvd4', True, False, False), + ('gen2_i2c_sda', 't6', 0x3254, 'i2c2', 'rsvd2', 'gmi', 'rsvd4', True, False, False), + ('sdmmc4_cmd', 't7', 0x325c, 'sdmmc4', 'rsvd2', 'gmi', 'rsvd4', False, True, False), + ('', 'u0', 0x3184, 'owr', 'uarta', 'rsvd3', 'rsvd4', False, False, False), + ('', 'u1', 0x3188, 'rsvd1', 'uarta', 'rsvd3', 'rsvd4', False, False, False), + ('', 'u2', 0x318c, 'rsvd1', 'uarta', 'rsvd3', 'rsvd4', False, False, False), + ('', 'u3', 0x3190, 'pwm0', 'uarta', 'displaya', 'displayb', False, False, False), + ('', 'u4', 0x3194, 'pwm1', 'uarta', 'displaya', 'displayb', False, False, False), + ('', 'u5', 0x3198, 'pwm2', 'uarta', 'displaya', 'displayb', False, False, False), + ('', 'u6', 0x319c, 'pwm3', 'uarta', 'usb', 'displayb', False, False, False), + ('', 'v0', 0x3040, 'usb', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('', 'v1', 0x3044, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc3_cd_n', 'v2', 0x33e8, 'sdmmc3', 'owr', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc1_wp_n', 'v3', 0x33e4, 'sdmmc1', 'clk12', 'spi4', 'uarta', False, False, False), + ('ddc_scl', 'v4', 0x3114, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + ('ddc_sda', 'v5', 0x3118, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + # TRM calls this spi1_cs1_n; perhaps it's wrong? + ('gpio_w2_aud', 'w2', 0x33ec, 'spi6', 'rsvd2', 'spi2', 'i2c1', False, False, False), + # TRM calls this spi1_cs2_n; perhaps it's wrong? + ('gpio_w3_aud', 'w3', 0x33f0, 'spi6', 'spi1', 'spi2', 'i2c1', False, False, False), + ('clk1_out', 'w4', 0x334c, 'extperiph1', 'dap2', 'rsvd3', 'rsvd4', False, False, False), + ('clk2_out', 'w5', 0x3068, 'extperiph2', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('uart3_txd', 'w6', 0x3174, 'uartc', 'rsvd2', 'rsvd3', 'spi4', False, False, False), + ('uart3_rxd', 'w7', 0x3178, 'uartc', 'rsvd2', 'rsvd3', 'spi4', False, False, False), + # TRM calls this spi2_mosi; perhaps it's wrong? + ('dvfs_pwm', 'x0', 0x3368, 'spi6', 'cldvfs', 'rsvd3', 'rsvd4', False, False, False), + # TRM calls this spi2_miso; perhaps it's wrong? + ('gpio_x1_aud', 'x1', 0x336c, 'spi6', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + # TRM calls this spi2_sck; perhaps it's wrong? + ('dvfs_clk', 'x2', 0x3374, 'spi6', 'cldvfs', 'rsvd3', 'rsvd4', False, False, False), + # TRM calls this spi2_cs0_n; perhaps it's wrong? + ('gpio_x3_aud', 'x3', 0x3370, 'spi6', 'spi1', 'rsvd3', 'rsvd4', False, False, False), + # TRM calls this spi1_mosi; perhaps it's wrong? + ('gpio_x4_aud', 'x4', 0x3378, 'rsvd1', 'spi1', 'spi2', 'dap2', False, False, False), + # TRM calls this spi1_sck; perhaps it's wrong? + ('gpio_x5_aud', 'x5', 0x337c, 'rsvd1', 'spi1', 'spi2', 'rsvd4', False, False, False), + # TRM calls this spi1_cs0_n; perhaps it's wrong? + ('gpio_x6_aud', 'x6', 0x3380, 'spi6', 'spi1', 'spi2', 'rsvd4', False, False, False), + # TRM calls this spi2_cs0_n; perhaps it's wrong? + ('gpio_x7_aud', 'x7', 0x3384, 'rsvd1', 'spi1', 'spi2', 'rsvd4', False, False, False), + ('ulpi_clk', 'y0', 0x3020, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('ulpi_dir', 'y1', 0x3024, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('ulpi_nxt', 'y2', 0x3028, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('ulpi_stp', 'y3', 0x302c, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('sdmmc1_dat3', 'y4', 0x3050, 'sdmmc1', 'spdif', 'spi4', 'uarta', False, False, False), + ('sdmmc1_dat2', 'y5', 0x3054, 'sdmmc1', 'pwm0', 'spi4', 'uarta', False, False, False), + ('sdmmc1_dat1', 'y6', 0x3058, 'sdmmc1', 'pwm1', 'spi4', 'uarta', False, False, False), + ('sdmmc1_dat0', 'y7', 0x305c, 'sdmmc1', 'rsvd2', 'spi4', 'uarta', False, False, False), + ('sdmmc1_clk', 'z0', 0x3048, 'sdmmc1', 'clk12', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc1_cmd', 'z1', 0x304c, 'sdmmc1', 'spdif', 'spi4', 'uarta', False, False, False), + ('sys_clk_req', 'z5', 0x3320, 'sysclk', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pwr_i2c_scl', 'z6', 0x32b4, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('pwr_i2c_sda', 'z7', 0x32b8, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('sdmmc4_dat0', 'aa0', 0x3260, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat1', 'aa1', 0x3264, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat2', 'aa2', 0x3268, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat3', 'aa3', 0x326c, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat4', 'aa4', 0x3270, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat5', 'aa5', 0x3274, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat6', 'aa6', 0x3278, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat7', 'aa7', 0x327c, 'sdmmc4', 'rsvd2', 'gmi', 'rsvd4', False, True, False), + ('', 'bb0', 0x328c, 'i2s4', 'vi', 'vi_alt1', 'vi_alt3', False, False, False), + ('cam_i2c_scl', 'bb1', 0x3290, 'vgp1', 'i2c3', 'rsvd3', 'rsvd4', True, False, False), + ('cam_i2c_sda', 'bb2', 0x3294, 'vgp2', 'i2c3', 'rsvd3', 'rsvd4', True, False, False), + ('', 'bb3', 0x3298, 'vgp3', 'displaya', 'displayb', 'rsvd4', False, False, False), + ('', 'bb4', 0x329c, 'vgp4', 'displaya', 'displayb', 'rsvd4', False, False, False), + ('', 'bb5', 0x32a0, 'vgp5', 'displaya', 'displayb', 'rsvd4', False, False, False), + ('', 'bb6', 0x32a4, 'vgp6', 'displaya', 'displayb', 'rsvd4', False, False, False), + ('', 'bb7', 0x32a8, 'i2s4', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('cam_mclk', 'cc0', 0x3284, 'vi', 'vi_alt1', 'vi_alt3', 'rsvd4', False, False, False), + ('', 'cc1', 0x3288, 'i2s4', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('', 'cc2', 0x32ac, 'i2s4', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc4_clk', 'cc4', 0x3258, 'sdmmc4', 'rsvd2', 'gmi', 'rsvd4', False, True, False), + ('clk2_req', 'cc5', 0x306c, 'dap', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('clk3_out', 'ee0', 0x31b8, 'extperiph3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('clk3_req', 'ee1', 0x31bc, 'dev3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('clk1_req', 'ee2', 0x3348, 'dap', 'dap1', 'rsvd3', 'rsvd4', False, False, False), + ('hdmi_cec', 'ee3', 0x33e0, 'cec', 'sdmmc3', 'rsvd3', 'soc', True, False, False), + ('sdmmc3_clk_lb_out', 'ee4', 0x3400, 'sdmmc3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc3_clk_lb_in', 'ee5', 0x33fc, 'sdmmc3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), +) + +pins = ( + #name, reg, f0, f1, f2, f3, od, ior, rcv_sel + ('core_pwr_req', 0x3324, 'pwron', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('cpu_pwr_req', 0x3328, 'cpu', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pwr_int_n', 0x332c, 'pmi', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('reset_out_n', 0x3408, 'rsvd1', 'rsvd2', 'rsvd3', 'reset_out_n', False, False, False), + ('owr', 0x3334, 'owr', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + ('jtag_rtck', 0x32b0, 'rtck', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('clk_32k_in', 0x3330, 'clk', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('gmi_clk_lb', 0x3404, 'sdmmc2', 'nand', 'gmi', 'rsvd4', False, False, False), +) + +drive_groups = ( + #name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w, drvtype + ('ao1', 0x868, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('ao2', 0x86c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('at1', 0x870, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at2', 0x874, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at3', 0x878, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at4', 0x87c, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at5', 0x880, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('cdev1', 0x884, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('cdev2', 0x888, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap1', 0x890, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap2', 0x894, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap3', 0x898, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap4', 0x89c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dbg', 0x8a0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('sdio3', 0x8b0, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, False), + ('spi', 0x8b4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uaa', 0x8b8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uab', 0x8bc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uart2', 0x8c0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uart3', 0x8c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('sdio1', 0x8ec, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, False), + ('ddc', 0x8fc, 2, 3, -1, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('gma', 0x900, 2, 3, -1, 14, 5, 20, 5, 28, 2, 30, 2, False), + ('gme', 0x910, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('gmf', 0x914, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('gmg', 0x918, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('gmh', 0x91c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('owr', 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + # There is confusion in the TRM; is this UDA or UAD? + ('uda', 0x924, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dev3', 0x92c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('cec', 0x938, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('at6', 0x994, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, True), + ('dap5', 0x998, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('usb_vbus_en', 0x99c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('ao3', 0x9a0, 2, 3, 4, 12, 5, -1, -1, 28, 2, -1, -1, False), + ('hv0', 0x9a4, 2, 3, 4, 12, 5, -1, -1, 28, 2, -1, -1, False), + ('sdio4', 0x9a8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('ao0', 0x9ac, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), +) + +drive_group_pins = { + 'ao1': ( + 'kb_row0_pr0', + 'kb_row1_pr1', + 'kb_row2_pr2', + 'kb_row3_pr3', + 'kb_row4_pr4', + 'kb_row5_pr5', + 'kb_row6_pr6', + 'kb_row7_pr7', + 'pwr_i2c_scl_pz6', + 'pwr_i2c_sda_pz7', + ), + 'ao2': ( + 'clk_32k_out_pa0', + 'kb_col0_pq0', + 'kb_col1_pq1', + 'kb_col2_pq2', + 'kb_col3_pq3', + 'kb_col4_pq4', + 'kb_col5_pq5', + 'kb_col6_pq6', + 'kb_col7_pq7', + 'kb_row8_ps0', + 'kb_row9_ps1', + 'kb_row10_ps2', + 'sys_clk_req_pz5', + 'core_pwr_req', + 'cpu_pwr_req', + 'reset_out_n', + ), + 'at1': ( + 'gmi_ad8_ph0', + 'gmi_ad9_ph1', + 'gmi_ad10_ph2', + 'gmi_ad11_ph3', + 'gmi_ad12_ph4', + 'gmi_ad13_ph5', + 'gmi_ad14_ph6', + 'gmi_ad15_ph7', + 'gmi_iordy_pi5', + 'gmi_cs7_n_pi6', + ), + 'at2': ( + 'gmi_ad0_pg0', + 'gmi_ad1_pg1', + 'gmi_ad2_pg2', + 'gmi_ad3_pg3', + 'gmi_ad4_pg4', + 'gmi_ad5_pg5', + 'gmi_ad6_pg6', + 'gmi_ad7_pg7', + 'gmi_wr_n_pi0', + 'gmi_oe_n_pi1', + 'gmi_cs6_n_pi3', + 'gmi_rst_n_pi4', + 'gmi_wait_pi7', + 'gmi_dqs_p_pj3', + 'gmi_adv_n_pk0', + 'gmi_clk_pk1', + 'gmi_cs4_n_pk2', + 'gmi_cs2_n_pk3', + 'gmi_cs3_n_pk4', + ), + 'at3': ( + 'gmi_wp_n_pc7', + 'gmi_cs0_n_pj0', + ), + 'at4': ( + 'gmi_a17_pb0', + 'gmi_a18_pb1', + 'gmi_cs1_n_pj2', + 'gmi_a16_pj7', + 'gmi_a19_pk7', + ), + 'at5': ( + 'gen2_i2c_scl_pt5', + 'gen2_i2c_sda_pt6', + ), + 'cdev1': ( + 'clk1_out_pw4', + 'clk1_req_pee2', + ), + 'cdev2': ( + 'clk2_out_pw5', + 'clk2_req_pcc5', + 'sdmmc1_wp_n_pv3', + ), + 'dap1': ( + 'dap1_fs_pn0', + 'dap1_din_pn1', + 'dap1_dout_pn2', + 'dap1_sclk_pn3', + ), + 'dap2': ( + 'dap2_fs_pa2', + 'dap2_sclk_pa3', + 'dap2_din_pa4', + 'dap2_dout_pa5', + ), + 'dap3': ( + 'dap3_fs_pp0', + 'dap3_din_pp1', + 'dap3_dout_pp2', + 'dap3_sclk_pp3', + ), + 'dap4': ( + 'dap4_fs_pp4', + 'dap4_din_pp5', + 'dap4_dout_pp6', + 'dap4_sclk_pp7', + ), + 'dbg': ( + 'gen1_i2c_scl_pc4', + 'gen1_i2c_sda_pc5', + 'pu0', + 'pu1', + 'pu2', + 'pu3', + 'pu4', + 'pu5', + 'pu6', + ), + 'sdio3': ( + 'sdmmc3_clk_pa6', + 'sdmmc3_cmd_pa7', + 'sdmmc3_dat3_pb4', + 'sdmmc3_dat2_pb5', + 'sdmmc3_dat1_pb6', + 'sdmmc3_dat0_pb7', + 'sdmmc3_clk_lb_out_pee4', + 'sdmmc3_clk_lb_in_pee5', + ), + 'spi': ( + 'dvfs_pwm_px0', + 'gpio_x1_aud_px1', + 'dvfs_clk_px2', + 'gpio_x3_aud_px3', + 'gpio_x4_aud_px4', + 'gpio_x5_aud_px5', + 'gpio_x6_aud_px6', + 'gpio_x7_aud_px7', + 'gpio_w2_aud_pw2', + 'gpio_w3_aud_pw3', + ), + 'uaa': ( + 'ulpi_data0_po1', + 'ulpi_data1_po2', + 'ulpi_data2_po3', + 'ulpi_data3_po4', + ), + 'uab': ( + 'ulpi_data7_po0', + 'ulpi_data4_po5', + 'ulpi_data5_po6', + 'ulpi_data6_po7', + 'pv0', + 'pv1', + ), + 'uart2': ( + 'uart2_txd_pc2', + 'uart2_rxd_pc3', + 'uart2_cts_n_pj5', + 'uart2_rts_n_pj6', + ), + 'uart3': ( + 'uart3_cts_n_pa1', + 'uart3_rts_n_pc0', + 'uart3_txd_pw6', + 'uart3_rxd_pw7', + ), + 'sdio1': ( + 'sdmmc1_dat3_py4', + 'sdmmc1_dat2_py5', + 'sdmmc1_dat1_py6', + 'sdmmc1_dat0_py7', + 'sdmmc1_clk_pz0', + 'sdmmc1_cmd_pz1', + ), + 'ddc': ( + 'ddc_scl_pv4', + 'ddc_sda_pv5', + ), + 'gma': ( + 'sdmmc4_clk_pcc4', + 'sdmmc4_cmd_pt7', + 'sdmmc4_dat0_paa0', + 'sdmmc4_dat1_paa1', + 'sdmmc4_dat2_paa2', + 'sdmmc4_dat3_paa3', + 'sdmmc4_dat4_paa4', + 'sdmmc4_dat5_paa5', + 'sdmmc4_dat6_paa6', + 'sdmmc4_dat7_paa7', + ), + 'gme': ( + 'pbb0', + 'cam_i2c_scl_pbb1', + 'cam_i2c_sda_pbb2', + 'pbb3', + 'pcc2', + ), + 'gmf': ( + 'pbb4', + 'pbb5', + 'pbb6', + 'pbb7', + ), + 'gmg': ( + 'cam_mclk_pcc0', + ), + 'gmh': ( + 'pcc1', + ), + 'owr': ( + 'sdmmc3_cd_n_pv2', + ), + 'uda': ( + 'ulpi_clk_py0', + 'ulpi_dir_py1', + 'ulpi_nxt_py2', + 'ulpi_stp_py3', + ), + 'dev3': ( + # FIXME + ), + 'cec': ( + # FIXME + ), + 'at6': ( + # FIXME + ), + 'dap5': ( + # FIXME + ), + 'usb_vbus_en': ( + # FIXME + ), + 'ao3': ( + # FIXME + ), + 'hv0': ( + # FIXME + ), + 'sdio4': ( + # FIXME + ), + 'ao0': ( + # FIXME + ), +} diff --git a/configs/tegra124.soc b/configs/tegra124.soc new file mode 100644 index 0000000..1e13bba --- /dev/null +++ b/configs/tegra124.soc @@ -0,0 +1,526 @@ +# All data validated against Tegra124 TRM on 2014/03/12 by swarren except: +# - drive group lpmd_b column, which is missing from the TRM (nvbug 1480165) +# - drive_group_pins[] content + +kernel_copyright_years = '2013-2014' +kernel_author = 'Ashwini Ghuge <aghuge@nvidia.com>' +uboot_copyright_years = '2013-2014' + +gpios = ( + #name, gpio, reg, f0, f1, f2, f3, od, ior, rcv_sel + ('clk_32k_out', 'a0', 0x331c, 'blink', 'soc', 'rsvd3', 'rsvd4', False, False, False), + ('uart3_cts_n', 'a1', 0x317c, 'uartc', 'sdmmc1', 'dtv', 'gmi', False, False, False), + ('dap2_fs', 'a2', 0x3358, 'i2s1', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap2_sclk', 'a3', 0x3364, 'i2s1', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap2_din', 'a4', 0x335c, 'i2s1', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap2_dout', 'a5', 0x3360, 'i2s1', 'hda', 'gmi', 'rsvd4', False, False, False), + ('sdmmc3_clk', 'a6', 0x3390, 'sdmmc3', 'rsvd2', 'rsvd3', 'spi3', False, False, False), + ('sdmmc3_cmd', 'a7', 0x3394, 'sdmmc3', 'pwm3', 'uarta', 'spi3', False, False, False), + ('', 'b0', 0x3234, 'uartd', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'b1', 0x3238, 'uartd', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('sdmmc3_dat3', 'b4', 0x33a4, 'sdmmc3', 'pwm0', 'displayb', 'spi3', False, False, False), + ('sdmmc3_dat2', 'b5', 0x33a0, 'sdmmc3', 'pwm1', 'displaya', 'spi3', False, False, False), + ('sdmmc3_dat1', 'b6', 0x339c, 'sdmmc3', 'pwm2', 'uarta', 'spi3', False, False, False), + ('sdmmc3_dat0', 'b7', 0x3398, 'sdmmc3', 'rsvd2', 'rsvd3', 'spi3', False, False, False), + ('uart3_rts_n', 'c0', 0x3180, 'uartc', 'pwm0', 'dtv', 'gmi', False, False, False), + ('uart2_txd', 'c2', 0x3168, 'irda', 'spdif', 'uarta', 'spi4', False, False, False), + ('uart2_rxd', 'c3', 0x3164, 'irda', 'spdif', 'uarta', 'spi4', False, False, False), + ('gen1_i2c_scl', 'c4', 0x31a4, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('gen1_i2c_sda', 'c5', 0x31a0, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('', 'c7', 0x31c0, 'rsvd1', 'rsvd2', 'gmi', 'gmi_alt', False, False, False), + ('', 'g0', 0x31f0, 'rsvd1', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'g1', 0x31f4, 'rsvd1', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'g2', 0x31f8, 'rsvd1', 'trace', 'gmi', 'rsvd4', False, False, False), + ('', 'g3', 0x31fc, 'rsvd1', 'trace', 'gmi', 'rsvd4', False, False, False), + ('', 'g4', 0x3200, 'rsvd1', 'tmds', 'gmi', 'spi4', False, False, False), + ('', 'g5', 0x3204, 'rsvd1', 'rsvd2', 'gmi', 'spi4', False, False, False), + ('', 'g6', 0x3208, 'rsvd1', 'rsvd2', 'gmi', 'spi4', False, False, False), + ('', 'g7', 0x320c, 'rsvd1', 'rsvd2', 'gmi', 'spi4', False, False, False), + ('', 'h0', 0x3210, 'pwm0', 'trace', 'gmi', 'dtv', False, False, False), + ('', 'h1', 0x3214, 'pwm1', 'tmds', 'gmi', 'displaya', False, False, False), + ('', 'h2', 0x3218, 'pwm2', 'tmds', 'gmi', 'cldvfs', False, False, False), + ('', 'h3', 0x321c, 'pwm3', 'spi4', 'gmi', 'cldvfs', False, False, False), + ('', 'h4', 0x3220, 'sdmmc2', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'h5', 0x3224, 'sdmmc2', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'h6', 0x3228, 'sdmmc2', 'trace', 'gmi', 'dtv', False, False, False), + ('', 'h7', 0x322c, 'sdmmc2', 'trace', 'gmi', 'dtv', False, False, False), + ('', 'i0', 0x3240, 'rsvd1', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'i1', 0x3244, 'rsvd1', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'i2', 0x3248, 'sdmmc2', 'trace', 'gmi', 'rsvd4', False, False, False), + ('', 'i3', 0x31e8, 'rsvd1', 'rsvd2', 'gmi', 'spi4', False, False, False), + ('', 'i4', 0x324c, 'spi4', 'trace', 'gmi', 'displaya', False, False, False), + ('', 'i5', 0x31c4, 'sdmmc2', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'i6', 0x31ec, 'rsvd1', 'rsvd2', 'gmi', 'sdmmc2', False, False, False), + ('', 'i7', 0x31c8, 'rsvd1', 'trace', 'gmi', 'dtv', False, False, False), + ('', 'j0', 0x31d4, 'rsvd1', 'rsvd2', 'gmi', 'usb', False, False, False), + ('', 'j2', 0x31d8, 'rsvd1', 'rsvd2', 'gmi', 'soc', False, False, False), + ('uart2_cts_n', 'j5', 0x3170, 'uarta', 'uartb', 'gmi', 'spi4', False, False, False), + ('uart2_rts_n', 'j6', 0x316c, 'uarta', 'uartb', 'gmi', 'spi4', False, False, False), + ('', 'j7', 0x3230, 'uartd', 'rsvd2', 'gmi', 'gmi_alt', False, False, False), + ('', 'k0', 0x31cc, 'rsvd1', 'sdmmc3', 'gmi', 'soc', False, False, False), + ('', 'k1', 0x31d0, 'sdmmc2', 'trace', 'gmi', 'rsvd4', False, False, False), + ('', 'k2', 0x31e4, 'rsvd1', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('', 'k3', 0x31dc, 'sdmmc2', 'trace', 'gmi', 'ccla', False, False, False), + ('', 'k4', 0x31e0, 'sdmmc2', 'rsvd2', 'gmi', 'gmi_alt', False, False, False), + ('spdif_out', 'k5', 0x3354, 'spdif', 'rsvd2', 'rsvd3', 'i2c3', False, False, False), + ('spdif_in', 'k6', 0x3350, 'spdif', 'rsvd2', 'rsvd3', 'i2c3', False, False, False), + ('', 'k7', 0x323c, 'uartd', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('dap1_fs', 'n0', 0x3338, 'i2s0', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap1_din', 'n1', 0x333c, 'i2s0', 'hda', 'gmi', 'rsvd4', False, False, False), + ('dap1_dout', 'n2', 0x3340, 'i2s0', 'hda', 'gmi', 'sata', False, False, False), + ('dap1_sclk', 'n3', 0x3344, 'i2s0', 'hda', 'gmi', 'rsvd4', False, False, False), + ('usb_vbus_en0', 'n4', 0x33f4, 'usb', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('usb_vbus_en1', 'n5', 0x33f8, 'usb', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('hdmi_int', 'n7', 0x3110, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + ('ulpi_data7', 'o0', 0x301c, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data0', 'o1', 0x3000, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data1', 'o2', 0x3004, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data2', 'o3', 0x3008, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data3', 'o4', 0x300c, 'spi3', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data4', 'o5', 0x3010, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data5', 'o6', 0x3014, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('ulpi_data6', 'o7', 0x3018, 'spi2', 'hsi', 'uarta', 'ulpi', False, False, False), + ('dap3_fs', 'p0', 0x3030, 'i2s2', 'spi5', 'displaya', 'displayb', False, False, False), + ('dap3_din', 'p1', 0x3034, 'i2s2', 'spi5', 'displaya', 'displayb', False, False, False), + ('dap3_dout', 'p2', 0x3038, 'i2s2', 'spi5', 'displaya', 'rsvd4', False, False, False), + ('dap3_sclk', 'p3', 0x303c, 'i2s2', 'spi5', 'rsvd3', 'displayb', False, False, False), + ('dap4_fs', 'p4', 0x31a8, 'i2s3', 'gmi', 'dtv', 'rsvd4', False, False, False), + ('dap4_din', 'p5', 0x31ac, 'i2s3', 'gmi', 'rsvd3', 'rsvd4', False, False, False), + ('dap4_dout', 'p6', 0x31b0, 'i2s3', 'gmi', 'dtv', 'rsvd4', False, False, False), + ('dap4_sclk', 'p7', 0x31b4, 'i2s3', 'gmi', 'rsvd3', 'rsvd4', False, False, False), + ('kb_col0', 'q0', 0x32fc, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_col1', 'q1', 0x3300, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_col2', 'q2', 0x3304, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_col3', 'q3', 0x3308, 'kbc', 'displaya', 'pwm2', 'uarta', False, False, False), + ('kb_col4', 'q4', 0x330c, 'kbc', 'owr', 'sdmmc3', 'uarta', False, False, False), + ('kb_col5', 'q5', 0x3310, 'kbc', 'rsvd2', 'sdmmc3', 'rsvd4', False, False, False), + ('kb_col6', 'q6', 0x3314, 'kbc', 'rsvd2', 'spi2', 'uartd', False, False, False), + ('kb_col7', 'q7', 0x3318, 'kbc', 'rsvd2', 'spi2', 'uartd', False, False, False), + ('kb_row0', 'r0', 0x32bc, 'kbc', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('kb_row1', 'r1', 0x32c0, 'kbc', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('kb_row2', 'r2', 0x32c4, 'kbc', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('kb_row3', 'r3', 0x32c8, 'kbc', 'displaya', 'sys', 'displayb', False, False, False), + ('kb_row4', 'r4', 0x32cc, 'kbc', 'displaya', 'rsvd3', 'displayb', False, False, False), + ('kb_row5', 'r5', 0x32d0, 'kbc', 'displaya', 'rsvd3', 'displayb', False, False, False), + ('kb_row6', 'r6', 0x32d4, 'kbc', 'displaya', 'displaya_alt', 'displayb', False, False, False), + ('kb_row7', 'r7', 0x32d8, 'kbc', 'rsvd2', 'cldvfs', 'uarta', False, False, False), + ('kb_row8', 's0', 0x32dc, 'kbc', 'rsvd2', 'cldvfs', 'uarta', False, False, False), + ('kb_row9', 's1', 0x32e0, 'kbc', 'rsvd2', 'rsvd3', 'uarta', False, False, False), + ('kb_row10', 's2', 0x32e4, 'kbc', 'rsvd2', 'rsvd3', 'uarta', False, False, False), + ('kb_row11', 's3', 0x32e8, 'kbc', 'rsvd2', 'rsvd3', 'irda', False, False, False), + ('kb_row12', 's4', 0x32ec, 'kbc', 'rsvd2', 'rsvd3', 'irda', False, False, False), + ('kb_row13', 's5', 0x32f0, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_row14', 's6', 0x32f4, 'kbc', 'rsvd2', 'spi2', 'rsvd4', False, False, False), + ('kb_row15', 's7', 0x32f8, 'kbc', 'soc', 'rsvd3', 'rsvd4', False, False, False), + ('kb_row16', 't0', 0x340c, 'kbc', 'rsvd2', 'rsvd3', 'uartc', False, False, False), + ('kb_row17', 't1', 0x3410, 'kbc', 'rsvd2', 'rsvd3', 'uartc', False, False, False), + ('gen2_i2c_scl', 't5', 0x3250, 'i2c2', 'rsvd2', 'gmi', 'rsvd4', True, False, False), + ('gen2_i2c_sda', 't6', 0x3254, 'i2c2', 'rsvd2', 'gmi', 'rsvd4', True, False, False), + ('sdmmc4_cmd', 't7', 0x325c, 'sdmmc4', 'rsvd2', 'gmi', 'rsvd4', False, True, False), + ('', 'u0', 0x3184, 'owr', 'uarta', 'gmi', 'rsvd4', False, False, False), + ('', 'u1', 0x3188, 'rsvd1', 'uarta', 'gmi', 'rsvd4', False, False, False), + ('', 'u2', 0x318c, 'rsvd1', 'uarta', 'gmi', 'rsvd4', False, False, False), + ('', 'u3', 0x3190, 'pwm0', 'uarta', 'gmi', 'displayb', False, False, False), + ('', 'u4', 0x3194, 'pwm1', 'uarta', 'gmi', 'displayb', False, False, False), + ('', 'u5', 0x3198, 'pwm2', 'uarta', 'gmi', 'displayb', False, False, False), + ('', 'u6', 0x319c, 'pwm3', 'uarta', 'rsvd3', 'gmi', False, False, False), + ('', 'v0', 0x3040, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('', 'v1', 0x3044, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc3_cd_n', 'v2', 0x33e8, 'sdmmc3', 'owr', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc1_wp_n', 'v3', 0x33e4, 'sdmmc1', 'clk12', 'spi4', 'uarta', False, False, False), + ('ddc_scl', 'v4', 0x3114, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + ('ddc_sda', 'v5', 0x3118, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + ('gpio_w2_aud', 'w2', 0x33ec, 'spi6', 'rsvd2', 'spi2', 'i2c1', False, False, False), + ('gpio_w3_aud', 'w3', 0x33f0, 'spi6', 'spi1', 'spi2', 'i2c1', False, False, False), + ('dap_mclk1', 'w4', 0x334c, 'extperiph1', 'dap2', 'rsvd3', 'rsvd4', False, False, False), + ('clk2_out', 'w5', 0x3068, 'extperiph2', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('uart3_txd', 'w6', 0x3174, 'uartc', 'rsvd2', 'gmi', 'spi4', False, False, False), + ('uart3_rxd', 'w7', 0x3178, 'uartc', 'rsvd2', 'gmi', 'spi4', False, False, False), + ('dvfs_pwm', 'x0', 0x3368, 'spi6', 'cldvfs', 'gmi', 'rsvd4', False, False, False), + ('gpio_x1_aud', 'x1', 0x336c, 'spi6', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('dvfs_clk', 'x2', 0x3374, 'spi6', 'cldvfs', 'gmi', 'rsvd4', False, False, False), + ('gpio_x3_aud', 'x3', 0x3370, 'spi6', 'spi1', 'gmi', 'rsvd4', False, False, False), + ('gpio_x4_aud', 'x4', 0x3378, 'gmi', 'spi1', 'spi2', 'dap2', False, False, False), + ('gpio_x5_aud', 'x5', 0x337c, 'gmi', 'spi1', 'spi2', 'rsvd4', False, False, False), + ('gpio_x6_aud', 'x6', 0x3380, 'spi6', 'spi1', 'spi2', 'gmi', False, False, False), + ('gpio_x7_aud', 'x7', 0x3384, 'rsvd1', 'spi1', 'spi2', 'rsvd4', False, False, False), + ('ulpi_clk', 'y0', 0x3020, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('ulpi_dir', 'y1', 0x3024, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('ulpi_nxt', 'y2', 0x3028, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('ulpi_stp', 'y3', 0x302c, 'spi1', 'spi5', 'uartd', 'ulpi', False, False, False), + ('sdmmc1_dat3', 'y4', 0x3050, 'sdmmc1', 'spdif', 'spi4', 'uarta', False, False, False), + ('sdmmc1_dat2', 'y5', 0x3054, 'sdmmc1', 'pwm0', 'spi4', 'uarta', False, False, False), + ('sdmmc1_dat1', 'y6', 0x3058, 'sdmmc1', 'pwm1', 'spi4', 'uarta', False, False, False), + ('sdmmc1_dat0', 'y7', 0x305c, 'sdmmc1', 'rsvd2', 'spi4', 'uarta', False, False, False), + ('sdmmc1_clk', 'z0', 0x3048, 'sdmmc1', 'clk12', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc1_cmd', 'z1', 0x304c, 'sdmmc1', 'spdif', 'spi4', 'uarta', False, False, False), + ('pwr_i2c_scl', 'z6', 0x32b4, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('pwr_i2c_sda', 'z7', 0x32b8, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('sdmmc4_dat0', 'aa0', 0x3260, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat1', 'aa1', 0x3264, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat2', 'aa2', 0x3268, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat3', 'aa3', 0x326c, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat4', 'aa4', 0x3270, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat5', 'aa5', 0x3274, 'sdmmc4', 'spi3', 'rsvd3', 'rsvd4', False, True, False), + ('sdmmc4_dat6', 'aa6', 0x3278, 'sdmmc4', 'spi3', 'gmi', 'rsvd4', False, True, False), + ('sdmmc4_dat7', 'aa7', 0x327c, 'sdmmc4', 'rsvd2', 'gmi', 'rsvd4', False, True, False), + ('', 'bb0', 0x328c, 'vgp6', 'vimclk2', 'sdmmc2', 'vimclk2_alt', False, False, False), + ('cam_i2c_scl', 'bb1', 0x3290, 'vgp1', 'i2c3', 'rsvd3', 'sdmmc2', True, False, False), + ('cam_i2c_sda', 'bb2', 0x3294, 'vgp2', 'i2c3', 'rsvd3', 'sdmmc2', True, False, False), + ('', 'bb3', 0x3298, 'vgp3', 'displaya', 'displayb', 'sdmmc2', False, False, False), + ('', 'bb4', 0x329c, 'vgp4', 'displaya', 'displayb', 'sdmmc2', False, False, False), + ('', 'bb5', 0x32a0, 'vgp5', 'displaya', 'rsvd3', 'sdmmc2', False, False, False), + ('', 'bb6', 0x32a4, 'i2s4', 'rsvd2', 'displayb', 'sdmmc2', False, False, False), + ('', 'bb7', 0x32a8, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc2', False, False, False), + ('cam_mclk', 'cc0', 0x3284, 'vi', 'vi_alt1', 'vi_alt3', 'sdmmc2', False, False, False), + ('', 'cc1', 0x3288, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc2', False, False, False), + ('', 'cc2', 0x32ac, 'i2s4', 'rsvd2', 'sdmmc3', 'sdmmc2', False, False, False), + ('sdmmc4_clk', 'cc4', 0x3258, 'sdmmc4', 'rsvd2', 'gmi', 'rsvd4', False, True, False), + ('clk2_req', 'cc5', 0x306c, 'dap', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pex_l0_rst_n', 'dd1', 0x33bc, 'pe0', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pex_l0_clkreq_n', 'dd2', 0x33c0, 'pe0', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pex_wake_n', 'dd3', 0x33c4, 'pe', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pex_l1_rst_n', 'dd5', 0x33cc, 'pe1', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pex_l1_clkreq_n', 'dd6', 0x33d0, 'pe1', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('clk3_out', 'ee0', 0x31b8, 'extperiph3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('clk3_req', 'ee1', 0x31bc, 'dev3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('dap_mclk1_req', 'ee2', 0x3348, 'dap', 'dap1', 'sata', 'rsvd4', False, False, False), + ('hdmi_cec', 'ee3', 0x33e0, 'cec', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('sdmmc3_clk_lb_out', 'ee4', 0x3400, 'sdmmc3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('sdmmc3_clk_lb_in', 'ee5', 0x33fc, 'sdmmc3', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('dp_hpd', 'ff0', 0x3430, 'dp', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('usb_vbus_en2', 'ff1', 0x3414, 'usb', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), + ('', 'ff2', 0x3418, 'sata', 'rsvd2', 'rsvd3', 'rsvd4', True, False, False), +) + +pins = ( + #name, reg, f0, f1, f2, f3, od, ior, rcv_sel + ('core_pwr_req', 0x3324, 'pwron', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('cpu_pwr_req', 0x3328, 'cpu', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('pwr_int_n', 0x332c, 'pmi', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('gmi_clk_lb', 0x3404, 'sdmmc2', 'rsvd2', 'gmi', 'rsvd4', False, False, False), + ('reset_out_n', 0x3408, 'rsvd1', 'rsvd2', 'rsvd3', 'reset_out_n', False, False, False), + ('owr', 0x3334, 'owr', 'rsvd2', 'rsvd3', 'rsvd4', False, False, True), + ('clk_32k_in', 0x3330, 'clk', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), + ('jtag_rtck', 0x32b0, 'rtck', 'rsvd2', 'rsvd3', 'rsvd4', False, False, False), +) + +drive_groups = ( + #name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w, drvtype + ('ao1', 0x868, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('ao2', 0x86c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('at1', 0x870, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at2', 0x874, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at3', 0x878, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at4', 0x87c, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('at5', 0x880, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('cdev1', 0x884, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('cdev2', 0x888, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap1', 0x890, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap2', 0x894, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap3', 0x898, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dap4', 0x89c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dbg', 0x8a0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('sdio3', 0x8b0, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, False), + ('spi', 0x8b4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uaa', 0x8b8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uab', 0x8bc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uart2', 0x8c0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('uart3', 0x8c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('sdio1', 0x8ec, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, False), + ('ddc', 0x8fc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('gma', 0x900, 2, 3, 4, 14, 5, 20, 5, 28, 2, 30, 2, True), + ('gme', 0x910, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('gmf', 0x914, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('gmg', 0x918, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('gmh', 0x91c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, False), + ('owr', 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + # There is confusion in the TRM; is this UDA or UAD? + ('uda', 0x924, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('gpv', 0x928, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('dev3', 0x92c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('cec', 0x938, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('at6', 0x994, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, True), + ('dap5', 0x998, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('usb_vbus_en', 0x99c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('ao3', 0x9a8, 2, 3, 4, 12, 5, -1, -1, 28, 2, -1, -1, False), + ('ao0', 0x9b0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('hv0', 0x9b4, 2, 3, 4, 12, 5, -1, -1, 28, 2, -1, -1, False), + ('sdio4', 0x9c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, False), + ('ao4', 0x9c8, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, True), +) + +drive_group_pins = { + 'ao1': ( + 'kb_row0_pr0', + 'kb_row1_pr1', + 'kb_row2_pr2', + 'kb_row3_pr3', + 'kb_row4_pr4', + 'kb_row5_pr5', + 'kb_row6_pr6', + 'kb_row7_pr7', + 'pwr_i2c_scl_pz6', + 'pwr_i2c_sda_pz7', + ), + 'ao2': ( + 'clk_32k_out_pa0', + 'clk_32k_in', + 'kb_col0_pq0', + 'kb_col1_pq1', + 'kb_col2_pq2', + 'kb_col3_pq3', + 'kb_col4_pq4', + 'kb_col5_pq5', + 'kb_col6_pq6', + 'kb_col7_pq7', + 'kb_row8_ps0', + 'kb_row9_ps1', + 'kb_row10_ps2', + 'kb_row11_ps3', + 'kb_row12_ps4', + 'kb_row13_ps5', + 'kb_row14_ps6', + 'kb_row15_ps7', + 'kb_row16_pt0', + 'kb_row17_pt1', + 'sdmmc3_cd_n_pv2', + 'core_pwr_req', + 'cpu_pwr_req', + 'pwr_int_n', + ), + 'at1': ( + 'ph0', + 'ph1', + 'ph2', + 'ph3', + ), + 'at2': ( + 'pg0', + 'pg1', + 'pg2', + 'pg3', + 'pg4', + 'pg5', + 'pg6', + 'pg7', + 'pi0', + 'pi1', + 'pi3', + 'pi4', + 'pi7', + 'pk0', + 'pk2', + ), + 'at3': ( + 'pc7', + 'pj0', + ), + 'at4': ( + 'pb0', + 'pb1', + 'pj0', + 'pj7', + 'pk7', + ), + 'at5': ( + 'gen2_i2c_scl_pt5', + 'gen2_i2c_sda_pt6', + ), + 'cdev1': ( + 'dap_mclk1_pw4', + 'dap_mclk1_req_pee2', + ), + 'cdev2': ( + 'clk2_out_pw5', + 'clk2_req_pcc5', + ), + 'dap1': ( + 'dap1_fs_pn0', + 'dap1_din_pn1', + 'dap1_dout_pn2', + 'dap1_sclk_pn3', + ), + 'dap2': ( + 'dap2_fs_pa2', + 'dap2_sclk_pa3', + 'dap2_din_pa4', + 'dap2_dout_pa5', + ), + 'dap3': ( + 'dap3_fs_pp0', + 'dap3_din_pp1', + 'dap3_dout_pp2', + 'dap3_sclk_pp3', + ), + 'dap4': ( + 'dap4_fs_pp4', + 'dap4_din_pp5', + 'dap4_dout_pp6', + 'dap4_sclk_pp7', + ), + 'dbg': ( + 'gen1_i2c_scl_pc4', + 'gen1_i2c_sda_pc5', + 'pu0', + 'pu1', + 'pu2', + 'pu3', + 'pu4', + 'pu5', + 'pu6', + ), + 'sdio3': ( + 'sdmmc3_clk_pa6', + 'sdmmc3_cmd_pa7', + 'sdmmc3_dat3_pb4', + 'sdmmc3_dat2_pb5', + 'sdmmc3_dat1_pb6', + 'sdmmc3_dat0_pb7', + 'sdmmc3_clk_lb_out_pee4', + 'sdmmc3_clk_lb_in_pee5', + ), + 'spi': ( + 'dvfs_pwm_px0', + 'gpio_x1_aud_px1', + 'dvfs_clk_px2', + 'gpio_x3_aud_px3', + 'gpio_x4_aud_px4', + 'gpio_x5_aud_px5', + 'gpio_x6_aud_px6', + 'gpio_x7_aud_px7', + 'gpio_w2_aud_pw2', + 'gpio_w3_aud_pw3', + ), + 'uaa': ( + 'ulpi_data0_po1', + 'ulpi_data1_po2', + 'ulpi_data2_po3', + 'ulpi_data3_po4', + ), + 'uab': ( + 'ulpi_data7_po0', + 'ulpi_data4_po5', + 'ulpi_data5_po6', + 'ulpi_data6_po7', + 'pv0', + 'pv1', + ), + 'uart2': ( + 'uart2_txd_pc2', + 'uart2_rxd_pc3', + 'uart2_cts_n_pj5', + 'uart2_rts_n_pj6', + ), + 'uart3': ( + 'uart3_cts_n_pa1', + 'uart3_rts_n_pc0', + 'uart3_txd_pw6', + 'uart3_rxd_pw7', + ), + 'sdio1': ( + 'sdmmc1_dat3_py4', + 'sdmmc1_dat2_py5', + 'sdmmc1_dat1_py6', + 'sdmmc1_dat0_py7', + 'sdmmc1_clk_pz0', + 'sdmmc1_cmd_pz1', + ), + 'ddc': ( + 'ddc_scl_pv4', + 'ddc_sda_pv5', + ), + 'gma': ( + 'sdmmc4_clk_pcc4', + 'sdmmc4_cmd_pt7', + 'sdmmc4_dat0_paa0', + 'sdmmc4_dat1_paa1', + 'sdmmc4_dat2_paa2', + 'sdmmc4_dat3_paa3', + 'sdmmc4_dat4_paa4', + 'sdmmc4_dat5_paa5', + 'sdmmc4_dat6_paa6', + 'sdmmc4_dat7_paa7', + ), + 'gme': ( + 'pbb0', + 'cam_i2c_scl_pbb1', + 'cam_i2c_sda_pbb2', + 'pbb3', + 'pcc2', + ), + 'gmf': ( + 'pbb4', + 'pbb5', + 'pbb6', + 'pbb7', + ), + 'gmg': ( + 'cam_mclk_pcc0', + ), + 'gmh': ( + 'pcc1', + ), + 'owr': ( + 'sdmmc3_cd_n_pv2', + 'owr', + ), + 'uda': ( + 'ulpi_clk_py0', + 'ulpi_dir_py1', + 'ulpi_nxt_py2', + 'ulpi_stp_py3', + ), + 'gpv': ( + 'pex_l0_rst_n_pdd1', + 'pex_l0_clkreq_n_pdd2', + 'pex_wake_n_pdd3', + 'pex_l1_rst_n_pdd5', + 'pex_l1_clkreq_n_pdd6', + 'usb_vbus_en2_pff1', + 'pff2', + ), + 'dev3': ( + 'clk3_out_pee0', + 'clk3_req_pee1', + ), + 'cec': ( + 'hdmi_cec_pee3', + ), + 'at6': ( + 'pk1', + 'pk3', + 'pk4', + 'pi2', + 'pi5', + 'pi6', + 'ph4', + 'ph5', + 'ph6', + 'ph7', + ), + 'dap5': ( + 'spdif_in_pk6', + 'spdif_out_pk5', + 'dp_hpd_pff0', + ), + 'usb_vbus_en': ( + 'usb_vbus_en0_pn4', + 'usb_vbus_en1_pn5', + ), + 'ao3': ( + 'reset_out_n', + ), + 'ao0': ( + 'jtag_rtck', + ), + 'hv0': ( + 'hdmi_int_pn7', + ), + 'sdio4': ( + 'sdmmc1_wp_n_pv3', + ), + 'ao4': ( + 'jtag_rtck', + ), +} diff --git a/configs/tegra30.soc b/configs/tegra30.soc new file mode 100644 index 0000000..d91bccd --- /dev/null +++ b/configs/tegra30.soc @@ -0,0 +1,660 @@ +kernel_copyright_years = '2011-2012' +kernel_author = 'Stephen Warren <swarren@nvidia.com>' +uboot_copyright_years = '2010-2014' + +has_rcv_sel = False +has_drvtype = False + +gpios = ( + #name, gpio, reg, f0, f1, f2, f3, od, ior + ('clk_32k_out', 'a0', 0x331c, 'blink', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('uart3_cts_n', 'a1', 0x317c, 'uartc', 'rsvd2', 'gmi', 'rsvd4', False, False), + ('dap2_fs', 'a2', 0x3358, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False), + ('dap2_sclk', 'a3', 0x3364, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False), + ('dap2_din', 'a4', 0x335c, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False), + ('dap2_dout', 'a5', 0x3360, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False), + ('sdmmc3_clk', 'a6', 0x3390, 'uarta', 'pwm2', 'sdmmc3', 'spi3', False, False), + ('sdmmc3_cmd', 'a7', 0x3394, 'uarta', 'pwm3', 'sdmmc3', 'spi2', False, False), + ('gmi_a17', 'b0', 0x3234, 'uartd', 'spi4', 'gmi', 'dtv', False, False), + ('gmi_a18', 'b1', 0x3238, 'uartd', 'spi4', 'gmi', 'dtv', False, False), + ('lcd_pwr0', 'b2', 0x3090, 'displaya', 'displayb', 'spi5', 'hdcp', False, False), + ('lcd_pclk', 'b3', 0x3094, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('sdmmc3_dat3', 'b4', 0x33a4, 'rsvd1', 'pwm0', 'sdmmc3', 'spi3', False, False), + ('sdmmc3_dat2', 'b5', 0x33a0, 'rsvd1', 'pwm1', 'sdmmc3', 'spi3', False, False), + ('sdmmc3_dat1', 'b6', 0x339c, 'rsvd1', 'rsvd2', 'sdmmc3', 'spi3', False, False), + ('sdmmc3_dat0', 'b7', 0x3398, 'rsvd1', 'rsvd2', 'sdmmc3', 'spi3', False, False), + ('uart3_rts_n', 'c0', 0x3180, 'uartc', 'pwm0', 'gmi', 'rsvd4', False, False), + ('lcd_pwr1', 'c1', 0x3070, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('uart2_txd', 'c2', 0x3168, 'uartb', 'spdif', 'uarta', 'spi4', False, False), + ('uart2_rxd', 'c3', 0x3164, 'uartb', 'spdif', 'uarta', 'spi4', False, False), + ('gen1_i2c_scl', 'c4', 0x31a4, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False), + ('gen1_i2c_sda', 'c5', 0x31a0, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False), + ('lcd_pwr2', 'c6', 0x3074, 'displaya', 'displayb', 'spi5', 'hdcp', False, False), + ('gmi_wp_n', 'c7', 0x31c0, 'rsvd1', 'nand', 'gmi', 'gmi_alt', False, False), + ('sdmmc3_dat5', 'd0', 0x33ac, 'pwm0', 'spi4', 'sdmmc3', 'spi2', False, False), + ('sdmmc3_dat4', 'd1', 0x33a8, 'pwm1', 'spi4', 'sdmmc3', 'spi2', False, False), + ('lcd_dc1', 'd2', 0x310c, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('sdmmc3_dat6', 'd3', 0x33b0, 'spdif', 'spi4', 'sdmmc3', 'spi2', False, False), + ('sdmmc3_dat7', 'd4', 0x33b4, 'spdif', 'spi4', 'sdmmc3', 'spi2', False, False), + ('vi_d1', 'd5', 0x3128, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_vsync', 'd6', 0x315c, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True), + ('vi_hsync', 'd7', 0x3160, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True), + ('lcd_d0', 'e0', 0x30a4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d1', 'e1', 0x30a8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d2', 'e2', 0x30ac, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d3', 'e3', 0x30b0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d4', 'e4', 0x30b4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d5', 'e5', 0x30b8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d6', 'e6', 0x30bc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d7', 'e7', 0x30c0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d8', 'f0', 0x30c4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d9', 'f1', 0x30c8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d10', 'f2', 0x30cc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d11', 'f3', 0x30d0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d12', 'f4', 0x30d4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d13', 'f5', 0x30d8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d14', 'f6', 0x30dc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d15', 'f7', 0x30e0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('gmi_ad0', 'g0', 0x31f0, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad1', 'g1', 0x31f4, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad2', 'g2', 0x31f8, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad3', 'g3', 0x31fc, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad4', 'g4', 0x3200, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad5', 'g5', 0x3204, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad6', 'g6', 0x3208, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad7', 'g7', 0x320c, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad8', 'h0', 0x3210, 'pwm0', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad9', 'h1', 0x3214, 'pwm1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad10', 'h2', 0x3218, 'pwm2', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad11', 'h3', 0x321c, 'pwm3', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad12', 'h4', 0x3220, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad13', 'h5', 0x3224, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad14', 'h6', 0x3228, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_ad15', 'h7', 0x322c, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_wr_n', 'i0', 0x3240, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_oe_n', 'i1', 0x3244, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_dqs', 'i2', 0x3248, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_cs6_n', 'i3', 0x31e8, 'nand', 'nand_alt', 'gmi', 'sata', False, False), + ('gmi_rst_n', 'i4', 0x324c, 'nand', 'nand_alt', 'gmi', 'rsvd4', False, False), + ('gmi_iordy', 'i5', 0x31c4, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_cs7_n', 'i6', 0x31ec, 'nand', 'nand_alt', 'gmi', 'gmi_alt', False, False), + ('gmi_wait', 'i7', 0x31c8, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_cs0_n', 'j0', 0x31d4, 'rsvd1', 'nand', 'gmi', 'dtv', False, False), + ('lcd_de', 'j1', 0x3098, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('gmi_cs1_n', 'j2', 0x31d8, 'rsvd1', 'nand', 'gmi', 'dtv', False, False), + ('lcd_hsync', 'j3', 0x309c, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_vsync', 'j4', 0x30a0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('uart2_cts_n', 'j5', 0x3170, 'uarta', 'uartb', 'gmi', 'spi4', False, False), + ('uart2_rts_n', 'j6', 0x316c, 'uarta', 'uartb', 'gmi', 'spi4', False, False), + ('gmi_a16', 'j7', 0x3230, 'uartd', 'spi4', 'gmi', 'gmi_alt', False, False), + ('gmi_adv_n', 'k0', 0x31cc, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_clk', 'k1', 0x31d0, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_cs4_n', 'k2', 0x31e4, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_cs2_n', 'k3', 0x31dc, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False), + ('gmi_cs3_n', 'k4', 0x31e0, 'rsvd1', 'nand', 'gmi', 'gmi_alt', False, False), + ('spdif_out', 'k5', 0x3354, 'spdif', 'rsvd2', 'i2c1', 'sdmmc2', False, False), + ('spdif_in', 'k6', 0x3350, 'spdif', 'hda', 'i2c1', 'sdmmc2', False, False), + ('gmi_a19', 'k7', 0x323c, 'uartd', 'spi4', 'gmi', 'rsvd4', False, False), + ('vi_d2', 'l0', 0x312c, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_d3', 'l1', 0x3130, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_d4', 'l2', 0x3134, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_d5', 'l3', 0x3138, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_d6', 'l4', 0x313c, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_d7', 'l5', 0x3140, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_d8', 'l6', 0x3144, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_d9', 'l7', 0x3148, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('lcd_d16', 'm0', 0x30e4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d17', 'm1', 0x30e8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d18', 'm2', 0x30ec, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d19', 'm3', 0x30f0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d20', 'm4', 0x30f4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d21', 'm5', 0x30f8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d22', 'm6', 0x30fc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('lcd_d23', 'm7', 0x3100, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('dap1_fs', 'n0', 0x3338, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False), + ('dap1_din', 'n1', 0x333c, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False), + ('dap1_dout', 'n2', 0x3340, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False), + ('dap1_sclk', 'n3', 0x3344, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False), + ('lcd_cs0_n', 'n4', 0x3084, 'displaya', 'displayb', 'spi5', 'rsvd4', False, False), + ('lcd_sdout', 'n5', 0x307c, 'displaya', 'displayb', 'spi5', 'hdcp', False, False), + ('lcd_dc0', 'n6', 0x3088, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('hdmi_int', 'n7', 0x3110, 'hdmi', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('ulpi_data7', 'o0', 0x301c, 'spi2', 'hsi', 'uarta', 'ulpi', False, False), + ('ulpi_data0', 'o1', 0x3000, 'spi3', 'hsi', 'uarta', 'ulpi', False, False), + ('ulpi_data1', 'o2', 0x3004, 'spi3', 'hsi', 'uarta', 'ulpi', False, False), + ('ulpi_data2', 'o3', 0x3008, 'spi3', 'hsi', 'uarta', 'ulpi', False, False), + ('ulpi_data3', 'o4', 0x300c, 'spi3', 'hsi', 'uarta', 'ulpi', False, False), + ('ulpi_data4', 'o5', 0x3010, 'spi2', 'hsi', 'uarta', 'ulpi', False, False), + ('ulpi_data5', 'o6', 0x3014, 'spi2', 'hsi', 'uarta', 'ulpi', False, False), + ('ulpi_data6', 'o7', 0x3018, 'spi2', 'hsi', 'uarta', 'ulpi', False, False), + ('dap3_fs', 'p0', 0x3030, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False), + ('dap3_din', 'p1', 0x3034, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False), + ('dap3_dout', 'p2', 0x3038, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False), + ('dap3_sclk', 'p3', 0x303c, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False), + ('dap4_fs', 'p4', 0x31a8, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False), + ('dap4_din', 'p5', 0x31ac, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False), + ('dap4_dout', 'p6', 0x31b0, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False), + ('dap4_sclk', 'p7', 0x31b4, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False), + ('kb_col0', 'q0', 0x32fc, 'kbc', 'nand', 'trace', 'test', False, False), + ('kb_col1', 'q1', 0x3300, 'kbc', 'nand', 'trace', 'test', False, False), + ('kb_col2', 'q2', 0x3304, 'kbc', 'nand', 'trace', 'rsvd4', False, False), + ('kb_col3', 'q3', 0x3308, 'kbc', 'nand', 'trace', 'rsvd4', False, False), + ('kb_col4', 'q4', 0x330c, 'kbc', 'nand', 'trace', 'rsvd4', False, False), + ('kb_col5', 'q5', 0x3310, 'kbc', 'nand', 'trace', 'rsvd4', False, False), + ('kb_col6', 'q6', 0x3314, 'kbc', 'nand', 'trace', 'mio', False, False), + ('kb_col7', 'q7', 0x3318, 'kbc', 'nand', 'trace', 'mio', False, False), + ('kb_row0', 'r0', 0x32bc, 'kbc', 'nand', 'rsvd3', 'rsvd4', False, False), + ('kb_row1', 'r1', 0x32c0, 'kbc', 'nand', 'rsvd3', 'rsvd4', False, False), + ('kb_row2', 'r2', 0x32c4, 'kbc', 'nand', 'rsvd3', 'rsvd4', False, False), + ('kb_row3', 'r3', 0x32c8, 'kbc', 'nand', 'rsvd3', 'invalid', False, False), + ('kb_row4', 'r4', 0x32cc, 'kbc', 'nand', 'trace', 'rsvd4', False, False), + ('kb_row5', 'r5', 0x32d0, 'kbc', 'nand', 'trace', 'owr', False, False), + ('kb_row6', 'r6', 0x32d4, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row7', 'r7', 0x32d8, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row8', 's0', 0x32dc, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row9', 's1', 0x32e0, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row10', 's2', 0x32e4, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row11', 's3', 0x32e8, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row12', 's4', 0x32ec, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row13', 's5', 0x32f0, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row14', 's6', 0x32f4, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('kb_row15', 's7', 0x32f8, 'kbc', 'nand', 'sdmmc2', 'mio', False, False), + ('vi_pclk', 't0', 0x3154, 'rsvd1', 'sdmmc2', 'vi', 'rsvd4', False, True), + ('vi_mclk', 't1', 0x3158, 'vi', 'vi_alt1', 'vi_alt2', 'vi_alt3', False, True), + ('vi_d10', 't2', 0x314c, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True), + ('vi_d11', 't3', 0x3150, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True), + ('vi_d0', 't4', 0x3124, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True), + ('gen2_i2c_scl', 't5', 0x3250, 'i2c2', 'hdcp', 'gmi', 'rsvd4', True, False), + ('gen2_i2c_sda', 't6', 0x3254, 'i2c2', 'hdcp', 'gmi', 'rsvd4', True, False), + ('sdmmc4_cmd', 't7', 0x325c, 'i2c3', 'nand', 'gmi', 'sdmmc4', False, True), + ('', 'u0', 0x3184, 'owr', 'uarta', 'gmi', 'rsvd4', False, False), + ('', 'u1', 0x3188, 'rsvd1', 'uarta', 'gmi', 'rsvd4', False, False), + ('', 'u2', 0x318c, 'rsvd1', 'uarta', 'gmi', 'rsvd4', False, False), + ('', 'u3', 0x3190, 'pwm0', 'uarta', 'gmi', 'rsvd4', False, False), + ('', 'u4', 0x3194, 'pwm1', 'uarta', 'gmi', 'rsvd4', False, False), + ('', 'u5', 0x3198, 'pwm2', 'uarta', 'gmi', 'rsvd4', False, False), + ('', 'u6', 0x319c, 'pwm3', 'uarta', 'gmi', 'rsvd4', False, False), + ('jtag_rtck', 'u7', 0x32b0, 'rtck', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('', 'v0', 0x3040, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('', 'v1', 0x3044, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('', 'v2', 0x3060, 'owr', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('', 'v3', 0x3064, 'clk_12m_out', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('ddc_scl', 'v4', 0x3114, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('ddc_sda', 'v5', 0x3118, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('crt_hsync', 'v6', 0x311c, 'crt', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('crt_vsync', 'v7', 0x3120, 'crt', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('lcd_cs1_n', 'w0', 0x3104, 'displaya', 'displayb', 'spi5', 'rsvd4', False, False), + ('lcd_m1', 'w1', 0x3108, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False), + ('spi2_cs1_n', 'w2', 0x3388, 'spi3', 'spi2', 'spi2_alt', 'i2c1', False, False), + ('spi2_cs2_n', 'w3', 0x338c, 'spi3', 'spi2', 'spi2_alt', 'i2c1', False, False), + ('clk1_out', 'w4', 0x334c, 'extperiph1', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('clk2_out', 'w5', 0x3068, 'extperiph2', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('uart3_txd', 'w6', 0x3174, 'uartc', 'rsvd2', 'gmi', 'rsvd4', False, False), + ('uart3_rxd', 'w7', 0x3178, 'uartc', 'rsvd2', 'gmi', 'rsvd4', False, False), + ('spi2_mosi', 'x0', 0x3368, 'spi6', 'spi2', 'spi3', 'gmi', False, False), + ('spi2_miso', 'x1', 0x336c, 'spi6', 'spi2', 'spi3', 'gmi', False, False), + ('spi2_sck', 'x2', 0x3374, 'spi6', 'spi2', 'spi3', 'gmi', False, False), + ('spi2_cs0_n', 'x3', 0x3370, 'spi6', 'spi2', 'spi3', 'gmi', False, False), + ('spi1_mosi', 'x4', 0x3378, 'spi2', 'spi1', 'spi2_alt', 'gmi', False, False), + ('spi1_sck', 'x5', 0x337c, 'spi2', 'spi1', 'spi2_alt', 'gmi', False, False), + ('spi1_cs0_n', 'x6', 0x3380, 'spi2', 'spi1', 'spi2_alt', 'gmi', False, False), + ('spi1_miso', 'x7', 0x3384, 'spi3', 'spi1', 'spi2_alt', 'rsvd4', False, False), + ('ulpi_clk', 'y0', 0x3020, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False), + ('ulpi_dir', 'y1', 0x3024, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False), + ('ulpi_nxt', 'y2', 0x3028, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False), + ('ulpi_stp', 'y3', 0x302c, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False), + ('sdmmc1_dat3', 'y4', 0x3050, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False), + ('sdmmc1_dat2', 'y5', 0x3054, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False), + ('sdmmc1_dat1', 'y6', 0x3058, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False), + ('sdmmc1_dat0', 'y7', 0x305c, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False), + ('sdmmc1_clk', 'z0', 0x3048, 'sdmmc1', 'rsvd2', 'rsvd3', 'uarta', False, False), + ('sdmmc1_cmd', 'z1', 0x304c, 'sdmmc1', 'rsvd2', 'rsvd3', 'uarta', False, False), + ('lcd_sdin', 'z2', 0x3078, 'displaya', 'displayb', 'spi5', 'rsvd4', False, False), + ('lcd_wr_n', 'z3', 0x3080, 'displaya', 'displayb', 'spi5', 'hdcp', False, False), + ('lcd_sck', 'z4', 0x308c, 'displaya', 'displayb', 'spi5', 'hdcp', False, False), + ('sys_clk_req', 'z5', 0x3320, 'sysclk', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('pwr_i2c_scl', 'z6', 0x32b4, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False), + ('pwr_i2c_sda', 'z7', 0x32b8, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False), + ('sdmmc4_dat0', 'aa0', 0x3260, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True), + ('sdmmc4_dat1', 'aa1', 0x3264, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True), + ('sdmmc4_dat2', 'aa2', 0x3268, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True), + ('sdmmc4_dat3', 'aa3', 0x326c, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True), + ('sdmmc4_dat4', 'aa4', 0x3270, 'i2c3', 'i2s4', 'gmi', 'sdmmc4', False, True), + ('sdmmc4_dat5', 'aa5', 0x3274, 'vgp3', 'i2s4', 'gmi', 'sdmmc4', False, True), + ('sdmmc4_dat6', 'aa6', 0x3278, 'vgp4', 'i2s4', 'gmi', 'sdmmc4', False, True), + ('sdmmc4_dat7', 'aa7', 0x327c, 'vgp5', 'i2s4', 'gmi', 'sdmmc4', False, True), + ('', 'bb0', 0x328c, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc4', False, False), + ('cam_i2c_scl', 'bb1', 0x3290, 'vgp1', 'i2c3', 'rsvd3', 'sdmmc4', True, False), + ('cam_i2c_sda', 'bb2', 0x3294, 'vgp2', 'i2c3', 'rsvd3', 'sdmmc4', True, False), + ('', 'bb3', 0x3298, 'vgp3', 'displaya', 'displayb', 'sdmmc4', False, False), + ('', 'bb4', 0x329c, 'vgp4', 'displaya', 'displayb', 'sdmmc4', False, False), + ('', 'bb5', 0x32a0, 'vgp5', 'displaya', 'displayb', 'sdmmc4', False, False), + ('', 'bb6', 0x32a4, 'vgp6', 'displaya', 'displayb', 'sdmmc4', False, False), + ('', 'bb7', 0x32a8, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc4', False, False), + ('cam_mclk', 'cc0', 0x3284, 'vi', 'vi_alt1', 'vi_alt3', 'sdmmc4', False, False), + ('', 'cc1', 0x3288, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc4', False, False), + ('', 'cc2', 0x32ac, 'i2s4', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('sdmmc4_rst_n', 'cc3', 0x3280, 'vgp6', 'rsvd2', 'rsvd3', 'sdmmc4', False, True), + ('sdmmc4_clk', 'cc4', 0x3258, 'invalid', 'nand', 'gmi', 'sdmmc4', False, True), + ('clk2_req', 'cc5', 0x306c, 'dap', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('pex_l2_rst_n', 'cc6', 0x33d8, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l2_clkreq_n', 'cc7', 0x33dc, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l0_prsnt_n', 'dd0', 0x33b8, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l0_rst_n', 'dd1', 0x33bc, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l0_clkreq_n', 'dd2', 0x33c0, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_wake_n', 'dd3', 0x33c4, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l1_prsnt_n', 'dd4', 0x33c8, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l1_rst_n', 'dd5', 0x33cc, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l1_clkreq_n', 'dd6', 0x33d0, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('pex_l2_prsnt_n', 'dd7', 0x33d4, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False), + ('clk3_out', 'ee0', 0x31b8, 'extperiph3', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('clk3_req', 'ee1', 0x31bc, 'dev3', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('clk1_req', 'ee2', 0x3348, 'dap', 'hda', 'rsvd3', 'rsvd4', False, False), + ('hdmi_cec', 'ee3', 0x33e0, 'cec', 'rsvd2', 'rsvd3', 'rsvd4', True, False), + ('', 'ee4'), + ('', 'ee5'), + ('', 'ee6'), + ('', 'ee7'), +) + +pins = ( + #name, reg, f0, f1, f2, f3, od, ior + ('clk_32k_in', 0x3330, 'clk_32k_in', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('core_pwr_req', 0x3324, 'core_pwr_req', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('cpu_pwr_req', 0x3328, 'cpu_pwr_req', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('jtag_tck', ), + ('jtag_tdi', ), + ('jtag_tdo', ), + ('jtag_tms', ), + ('jtag_trst_n', ), + ('owr', 0x3334, 'owr', 'cec', 'rsvd3', 'rsvd4', False, False), + ('pwr_int_n', 0x332c, 'pwr_int_n', 'rsvd2', 'rsvd3', 'rsvd4', False, False), + ('sys_reset_n', ), + ('test_mode_en', ), +) + +drive_groups = ( + #name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w + ('ao1', 0x868, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('ao2', 0x86c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('at1', 0x870, 2, 3, 4, 14, 5, 19, 5, 24, 2, 28, 2), + ('at2', 0x874, 2, 3, 4, 14, 5, 19, 5, 24, 2, 28, 2), + ('at3', 0x878, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2), + ('at4', 0x87c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2), + ('at5', 0x880, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2), + ('cdev1', 0x884, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('cdev2', 0x888, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('cec', 0x938, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('crt', 0x8f8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('csus', 0x88c, -1, -1, -1, 12, 5, 19, 5, 24, 4, 28, 4), + ('dap1', 0x890, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('dap2', 0x894, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('dap3', 0x898, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('dap4', 0x89c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('dbg', 0x8a0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('ddc', 0x8fc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('dev3', 0x92c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('gma', 0x900, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4), + ('gmb', 0x904, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4), + ('gmc', 0x908, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4), + ('gmd', 0x90c, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4), + ('gme', 0x910, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2), + ('gmf', 0x914, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2), + ('gmg', 0x918, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2), + ('gmh', 0x91c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2), + ('gpv', 0x928, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('lcd1', 0x8a4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('lcd2', 0x8a8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('owr', 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('sdio1', 0x8ec, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2), + ('sdio2', 0x8ac, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2), + ('sdio3', 0x8b0, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2), + ('spi', 0x8b4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('uaa', 0x8b8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('uab', 0x8bc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('uart2', 0x8c0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('uart3', 0x8c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('uda', 0x924, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2), + ('vi1', 0x8c8, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4), +) + +drive_group_pins = { + 'ao1': ( + 'kb_row0_pr0', + 'kb_row1_pr1', + 'kb_row2_pr2', + 'kb_row3_pr3', + 'kb_row4_pr4', + 'kb_row5_pr5', + 'kb_row6_pr6', + 'kb_row7_pr7', + 'pwr_i2c_scl_pz6', + 'pwr_i2c_sda_pz7', + 'sys_reset_n', + ), + 'ao2': ( + 'clk_32k_out_pa0', + 'kb_col0_pq0', + 'kb_col1_pq1', + 'kb_col2_pq2', + 'kb_col3_pq3', + 'kb_col4_pq4', + 'kb_col5_pq5', + 'kb_col6_pq6', + 'kb_col7_pq7', + 'kb_row8_ps0', + 'kb_row9_ps1', + 'kb_row10_ps2', + 'kb_row11_ps3', + 'kb_row12_ps4', + 'kb_row13_ps5', + 'kb_row14_ps6', + 'kb_row15_ps7', + 'sys_clk_req_pz5', + 'clk_32k_in', + 'core_pwr_req', + 'cpu_pwr_req', + 'pwr_int_n', + ), + 'at1': ( + 'gmi_ad8_ph0', + 'gmi_ad9_ph1', + 'gmi_ad10_ph2', + 'gmi_ad11_ph3', + 'gmi_ad12_ph4', + 'gmi_ad13_ph5', + 'gmi_ad14_ph6', + 'gmi_ad15_ph7', + 'gmi_iordy_pi5', + 'gmi_cs7_n_pi6', + ), + 'at2': ( + 'gmi_ad0_pg0', + 'gmi_ad1_pg1', + 'gmi_ad2_pg2', + 'gmi_ad3_pg3', + 'gmi_ad4_pg4', + 'gmi_ad5_pg5', + 'gmi_ad6_pg6', + 'gmi_ad7_pg7', + 'gmi_wr_n_pi0', + 'gmi_oe_n_pi1', + 'gmi_dqs_pi2', + 'gmi_cs6_n_pi3', + 'gmi_rst_n_pi4', + 'gmi_wait_pi7', + 'gmi_adv_n_pk0', + 'gmi_clk_pk1', + 'gmi_cs4_n_pk2', + 'gmi_cs2_n_pk3', + 'gmi_cs3_n_pk4', + ), + 'at3': ( + 'gmi_wp_n_pc7', + 'gmi_cs0_n_pj0', + ), + 'at4': ( + 'gmi_a17_pb0', + 'gmi_a18_pb1', + 'gmi_cs1_n_pj2', + 'gmi_a16_pj7', + 'gmi_a19_pk7', + ), + 'at5': ( + 'gen2_i2c_scl_pt5', + 'gen2_i2c_sda_pt6', + ), + 'cdev1': ( + 'clk1_out_pw4', + 'clk1_req_pee2', + ), + 'cdev2': ( + 'clk2_out_pw5', + 'clk2_req_pcc5', + ), + 'cec': ( + 'hdmi_cec_pee3', + ), + 'crt': ( + 'crt_hsync_pv6', + 'crt_vsync_pv7', + ), + 'csus': ( + 'vi_mclk_pt1', + ), + 'dap1': ( + 'spdif_out_pk5', + 'spdif_in_pk6', + 'dap1_fs_pn0', + 'dap1_din_pn1', + 'dap1_dout_pn2', + 'dap1_sclk_pn3', + ), + 'dap2': ( + 'dap2_fs_pa2', + 'dap2_sclk_pa3', + 'dap2_din_pa4', + 'dap2_dout_pa5', + ), + 'dap3': ( + 'dap3_fs_pp0', + 'dap3_din_pp1', + 'dap3_dout_pp2', + 'dap3_sclk_pp3', + ), + 'dap4': ( + 'dap4_fs_pp4', + 'dap4_din_pp5', + 'dap4_dout_pp6', + 'dap4_sclk_pp7', + ), + 'dbg': ( + 'gen1_i2c_scl_pc4', + 'gen1_i2c_sda_pc5', + 'pu0', + 'pu1', + 'pu2', + 'pu3', + 'pu4', + 'pu5', + 'pu6', + 'jtag_rtck_pu7', + 'jtag_tck', + 'jtag_tdi', + 'jtag_tdo', + 'jtag_tms', + 'jtag_trst_n', + 'test_mode_en', + ), + 'ddc': ( + 'ddc_scl_pv4', + 'ddc_sda_pv5', + ), + 'dev3': ( + 'clk3_out_pee0', + 'clk3_req_pee1', + ), + 'gma': ( + 'sdmmc4_dat0_paa0', + 'sdmmc4_dat1_paa1', + 'sdmmc4_dat2_paa2', + 'sdmmc4_dat3_paa3', + 'sdmmc4_rst_n_pcc3', + ), + 'gmb': ( + 'sdmmc4_dat4_paa4', + 'sdmmc4_dat5_paa5', + 'sdmmc4_dat6_paa6', + 'sdmmc4_dat7_paa7', + ), + 'gmc': ( + 'sdmmc4_clk_pcc4', + ), + 'gmd': ( + 'sdmmc4_cmd_pt7', + ), + 'gme': ( + 'pbb0', + 'cam_i2c_scl_pbb1', + 'cam_i2c_sda_pbb2', + 'pbb3', + 'pcc2', + ), + 'gmf': ( + 'pbb4', + 'pbb5', + 'pbb6', + 'pbb7', + ), + 'gmg': ( + 'cam_mclk_pcc0', + ), + 'gmh': ( + 'pcc1', + ), + 'gpv': ( + 'pex_l2_rst_n_pcc6', + 'pex_l2_clkreq_n_pcc7', + 'pex_l0_prsnt_n_pdd0', + 'pex_l0_rst_n_pdd1', + 'pex_l0_clkreq_n_pdd2', + 'pex_wake_n_pdd3', + 'pex_l1_prsnt_n_pdd4', + 'pex_l1_rst_n_pdd5', + 'pex_l1_clkreq_n_pdd6', + 'pex_l2_prsnt_n_pdd7', + ), + 'lcd1': ( + 'lcd_pwr1_pc1', + 'lcd_pwr2_pc6', + 'lcd_cs0_n_pn4', + 'lcd_sdout_pn5', + 'lcd_dc0_pn6', + 'lcd_sdin_pz2', + 'lcd_wr_n_pz3', + 'lcd_sck_pz4', + ), + 'lcd2': ( + 'lcd_pwr0_pb2', + 'lcd_pclk_pb3', + 'lcd_dc1_pd2', + 'lcd_d0_pe0', + 'lcd_d1_pe1', + 'lcd_d2_pe2', + 'lcd_d3_pe3', + 'lcd_d4_pe4', + 'lcd_d5_pe5', + 'lcd_d6_pe6', + 'lcd_d7_pe7', + 'lcd_d8_pf0', + 'lcd_d9_pf1', + 'lcd_d10_pf2', + 'lcd_d11_pf3', + 'lcd_d12_pf4', + 'lcd_d13_pf5', + 'lcd_d14_pf6', + 'lcd_d15_pf7', + 'lcd_de_pj1', + 'lcd_hsync_pj3', + 'lcd_vsync_pj4', + 'lcd_d16_pm0', + 'lcd_d17_pm1', + 'lcd_d18_pm2', + 'lcd_d19_pm3', + 'lcd_d20_pm4', + 'lcd_d21_pm5', + 'lcd_d22_pm6', + 'lcd_d23_pm7', + 'hdmi_int_pn7', + 'lcd_cs1_n_pw0', + 'lcd_m1_pw1', + ), + 'owr': ( + 'owr', + ), + 'sdio1': ( + 'sdmmc1_dat3_py4', + 'sdmmc1_dat2_py5', + 'sdmmc1_dat1_py6', + 'sdmmc1_dat0_py7', + 'sdmmc1_clk_pz0', + 'sdmmc1_cmd_pz1', + ), + 'sdio2': ( + 'sdmmc3_dat5_pd0', + 'sdmmc3_dat4_pd1', + 'sdmmc3_dat6_pd3', + 'sdmmc3_dat7_pd4', + ), + 'sdio3': ( + 'sdmmc3_clk_pa6', + 'sdmmc3_cmd_pa7', + 'sdmmc3_dat3_pb4', + 'sdmmc3_dat2_pb5', + 'sdmmc3_dat1_pb6', + 'sdmmc3_dat0_pb7', + ), + 'spi': ( + 'spi2_cs1_n_pw2', + 'spi2_cs2_n_pw3', + 'spi2_mosi_px0', + 'spi2_miso_px1', + 'spi2_sck_px2', + 'spi2_cs0_n_px3', + 'spi1_mosi_px4', + 'spi1_sck_px5', + 'spi1_cs0_n_px6', + 'spi1_miso_px7', + ), + 'uaa': ( + 'ulpi_data0_po1', + 'ulpi_data1_po2', + 'ulpi_data2_po3', + 'ulpi_data3_po4', + ), + 'uab': ( + 'ulpi_data7_po0', + 'ulpi_data4_po5', + 'ulpi_data5_po6', + 'ulpi_data6_po7', + 'pv0', + 'pv1', + 'pv2', + 'pv3', + ), + 'uart2': ( + 'uart2_txd_pc2', + 'uart2_rxd_pc3', + 'uart2_cts_n_pj5', + 'uart2_rts_n_pj6', + ), + 'uart3': ( + 'uart3_cts_n_pa1', + 'uart3_rts_n_pc0', + 'uart3_txd_pw6', + 'uart3_rxd_pw7', + ), + 'uda': ( + 'ulpi_clk_py0', + 'ulpi_dir_py1', + 'ulpi_nxt_py2', + 'ulpi_stp_py3', + ), + 'vi1': ( + 'vi_d1_pd5', + 'vi_vsync_pd6', + 'vi_hsync_pd7', + 'vi_d2_pl0', + 'vi_d3_pl1', + 'vi_d4_pl2', + 'vi_d5_pl3', + 'vi_d6_pl4', + 'vi_d7_pl5', + 'vi_d8_pl6', + 'vi_d9_pl7', + 'vi_pclk_pt0', + 'vi_d10_pt2', + 'vi_d11_pt3', + 'vi_d0_pt4', + ), +} diff --git a/configs/venice2.board b/configs/venice2.board new file mode 100644 index 0000000..49f8bbf --- /dev/null +++ b/configs/venice2.board @@ -0,0 +1,198 @@ +soc = 'tegra124' + +pins = ( + #pin, mux, gpio_init, pull, tri, e_inp, od, rcv_sel + ('dap_mclk1_pw4', 'extperiph1', None, 'none', False, False, False, False), + ('dap_mclk1_req_pee2', 'rsvd4', None, 'down', True, False, False, False), + ('dap1_din_pn1', 'i2s0', None, 'none', False, True, False, False), + ('dap1_dout_pn2', 'i2s0', None, 'none', False, True, False, False), + ('dap1_fs_pn0', 'i2s0', None, 'none', False, True, False, False), + ('dap1_sclk_pn3', 'i2s0', None, 'none', False, True, False, False), + ('dap2_din_pa4', 'i2s1', None, 'none', False, True, False, False), + ('dap2_dout_pa5', 'i2s1', None, 'none', False, True, False, False), + ('dap2_fs_pa2', 'i2s1', None, 'none', False, True, False, False), + ('dap2_sclk_pa3', 'i2s1', None, 'none', False, True, False, False), + ('gpio_x4_aud_px4', None, 'in', 'none', False, True, False, False), + ('gpio_x5_aud_px5', 'rsvd4', None, 'down', True, False, False, False), + ('gpio_x6_aud_px6', 'gmi', None, 'down', True, False, False, False), + ('gpio_x7_aud_px7', None, 'out0', 'none', False, False, False, False), + ('gpio_w2_aud_pw2', 'rsvd2', None, 'down', True, False, False, False), + ('gpio_w3_aud_pw3', None, 'in', 'none', False, True, False, False), + ('dvfs_pwm_px0', 'cldvfs', None, 'none', False, False, False, False), + ('gpio_x1_aud_px1', None, 'in', 'none', False, True, False, False), + ('dvfs_clk_px2', 'cldvfs', None, 'none', False, False, False, False), + ('gpio_x3_aud_px3', None, 'in', 'none', False, True, False, False), + ('dap3_din_pp1', 'i2s2', None, 'down', True, False, False, False), + ('dap3_dout_pp2', None, 'out0', 'none', False, False, False, False), + ('dap3_fs_pp0', 'i2s2', None, 'down', True, False, False, False), + ('dap3_sclk_pp3', 'rsvd3', None, 'down', True, False, False, False), + ('pv0', None, 'in', 'none', False, True, False, False), + ('pv1', None, 'in', 'none', False, True, False, False), + ('ulpi_clk_py0', 'spi1', None, 'none', False, False, False, False), + ('ulpi_data0_po1', 'ulpi', None, 'down', True, False, False, False), + ('ulpi_data1_po2', None, 'in', 'none', False, True, False, False), + ('ulpi_data2_po3', 'ulpi', None, 'down', True, False, False, False), + ('ulpi_data3_po4', 'ulpi', None, 'down', True, False, False, False), + ('ulpi_data4_po5', None, 'in', 'up', False, True, False, False), + ('ulpi_data5_po6', None, 'out0', 'none', False, False, False, False), + ('ulpi_data6_po7', None, 'in', 'none', False, True, False, False), + ('ulpi_data7_po0', 'ulpi', None, 'down', True, False, False, False), + ('ulpi_dir_py1', 'spi1', None, 'none', False, True, False, False), + ('ulpi_nxt_py2', 'spi1', None, 'none', False, False, False, False), + ('ulpi_stp_py3', 'spi1', None, 'none', False, False, False, False), + ('cam_i2c_scl_pbb1', 'i2c3', None, 'none', False, True, True, False), + ('cam_i2c_sda_pbb2', 'i2c3', None, 'none', False, True, True, False), + ('cam_mclk_pcc0', 'vi', None, 'down', True, False, False, False), + ('pbb0', 'vgp6', None, 'down', True, False, False, False), + ('pbb3', 'vgp3', None, 'down', True, False, False, False), + ('pbb4', 'vgp4', None, 'down', True, False, False, False), + ('pbb5', 'rsvd3', None, 'down', True, False, False, False), + ('pbb6', 'rsvd2', None, 'down', True, False, False, False), + ('pbb7', 'rsvd2', None, 'down', True, False, False, False), + ('pcc1', 'rsvd2', None, 'down', True, False, False, False), + ('pcc2', 'rsvd2', None, 'down', True, False, False, False), + ('gen2_i2c_scl_pt5', 'i2c2', None, 'none', False, True, True, False), + ('gen2_i2c_sda_pt6', 'i2c2', None, 'none', False, True, True, False), + ('pj7', None, 'in', 'none', False, True, False, False), + ('pb0', 'rsvd2', None, 'down', True, False, False, False), + ('pb1', 'rsvd2', None, 'down', True, False, False, False), + ('pk7', None, 'in', 'none', False, True, False, False), + ('pg0', None, 'in', 'none', False, True, False, False), + ('pg1', None, 'in', 'none', False, True, False, False), + ('ph2', None, 'in', 'none', False, True, False, False), + ('ph3', 'gmi', None, 'down', True, False, False, False), + ('ph4', None, 'in', 'none', False, True, False, False), + ('ph5', None, 'out0', 'none', False, False, False, False), + ('ph6', None, 'in', 'none', False, True, False, False), + ('ph7', None, 'out1', 'none', False, False, False, False), + ('pg2', None, 'in', 'none', False, True, False, False), + ('pg3', None, 'in', 'none', False, True, False, False), + ('pg4', 'spi4', None, 'none', False, False, False, False), + ('pg5', 'spi4', None, 'none', False, False, False, False), + ('pg6', 'spi4', None, 'none', False, False, False, False), + ('pg7', 'spi4', None, 'none', False, True, False, False), + ('ph0', 'pwm0', None, 'none', False, False, False, False), + ('ph1', 'pwm1', None, 'none', False, False, False, False), + ('pk0', None, 'in', 'none', False, True, False, False), + ('pk1', None, 'out0', 'none', False, False, False, False), + ('pj0', None, 'in', 'up', False, True, False, False), + ('pj2', 'rsvd1', None, 'down', True, False, False, False), + ('pk3', None, 'in', 'none', False, True, False, False), + ('pk4', None, 'out0', 'up', False, False, False, False), + ('pk2', None, 'in', 'none', False, True, False, False), + ('pi3', 'spi4', None, 'none', False, False, False, False), + ('pi6', None, 'in', 'none', False, True, False, False), + ('pi2', None, 'out0', 'none', False, False, False, False), + ('pi5', 'rsvd2', None, 'up', True, False, False, False), + ('pi1', None, 'in', 'none', False, True, False, False), + ('pi4', None, 'out0', 'none', False, False, False, False), + ('pi7', 'rsvd1', None, 'down', True, False, False, False), + ('pc7', None, 'in', 'none', False, True, False, False), + ('pi0', None, 'in', 'none', False, True, False, False), + ('pex_l0_clkreq_n_pdd2', 'rsvd2', None, 'down', True, False, False, False), + ('pex_l0_rst_n_pdd1', 'rsvd2', None, 'down', True, False, False, False), + ('pex_l1_clkreq_n_pdd6', 'rsvd2', None, 'down', True, False, False, False), + ('pex_l1_rst_n_pdd5', 'rsvd2', None, 'down', True, False, False, False), + ('pex_wake_n_pdd3', 'rsvd2', None, 'down', True, False, False, False), + ('usb_vbus_en2_pff1', 'rsvd2', None, 'down', True, False, False, False), + ('pff2', 'rsvd2', None, 'down', True, False, False, False), + ('clk2_out_pw5', 'rsvd2', None, 'down', True, False, False, False), + ('clk2_req_pcc5', None, 'out0', 'none', False, False, False, False), + ('sdmmc1_wp_n_pv3', 'sdmmc1', None, 'down', True, False, False, False), + ('sdmmc1_clk_pz0', 'sdmmc1', None, 'none', False, True, False, False), + ('sdmmc1_cmd_pz1', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat0_py7', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat1_py6', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat2_py5', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc1_dat3_py4', 'sdmmc1', None, 'up', False, True, False, False), + ('sdmmc3_clk_pa6', 'sdmmc3', None, 'none', False, False, False, False), + ('sdmmc3_cmd_pa7', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat0_pb7', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat1_pb6', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat2_pb5', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_dat3_pb4', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc3_clk_lb_out_pee4', 'sdmmc3', None, 'none', False, False, False, False), + ('sdmmc3_clk_lb_in_pee5', 'sdmmc3', None, 'up', False, True, False, False), + ('sdmmc4_clk_pcc4', 'sdmmc4', None, 'none', False, True, False, False), + ('sdmmc4_cmd_pt7', 'sdmmc4', None, 'none', False, True, False, False), + ('sdmmc4_dat0_paa0', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat1_paa1', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat2_paa2', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat3_paa3', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat4_paa4', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat5_paa5', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat6_paa6', 'sdmmc4', None, 'up', False, True, False, False), + ('sdmmc4_dat7_paa7', 'sdmmc4', None, 'up', False, True, False, False), + ('kb_col0_pq0', None, 'in', 'none', False, True, False, False), + ('kb_col1_pq1', 'rsvd2', None, 'down', True, False, False, False), + ('kb_col2_pq2', 'rsvd2', None, 'down', True, False, False, False), + ('kb_col3_pq3', None, 'in', 'none', False, True, False, False), + ('kb_col4_pq4', 'sdmmc3', None, 'up', False, True, False, False), + ('kb_col5_pq5', 'rsvd2', None, 'down', True, False, False, False), + ('kb_col6_pq6', 'rsvd2', None, 'down', True, False, False, False), + ('kb_col7_pq7', 'rsvd2', None, 'down', True, False, False, False), + ('kb_row0_pr0', None, 'out0', 'none', False, False, False, False), + ('kb_row1_pr1', None, 'in', 'none', False, True, False, False), + ('kb_row10_ps2', 'uarta', None, 'none', False, True, False, False), + ('kb_row11_ps3', None, 'out0', 'none', False, False, False, False), + ('kb_row12_ps4', None, 'out0', 'none', False, False, False, False), + ('kb_row13_ps5', 'rsvd2', None, 'down', True, False, False, False), + ('kb_row14_ps6', 'rsvd2', None, 'down', True, False, False, False), + ('kb_row15_ps7', None, 'in', 'none', False, True, False, False), + ('kb_row16_pt0', 'rsvd2', None, 'down', True, False, False, False), + ('kb_row17_pt1', None, 'in', 'none', False, True, False, False), + ('kb_row2_pr2', 'rsvd2', None, 'down', True, False, False, False), + ('kb_row3_pr3', 'kbc', None, 'down', True, False, False, False), + ('kb_row4_pr4', None, 'in', 'none', False, True, False, False), + ('kb_row5_pr5', 'rsvd3', None, 'down', True, False, False, False), + ('kb_row6_pr6', 'kbc', None, 'down', True, False, False, False), + ('kb_row7_pr7', 'rsvd2', None, 'down', True, False, False, False), + ('kb_row8_ps0', None, 'in', 'none', False, True, False, False), + ('kb_row9_ps1', 'uarta', None, 'down', False, False, False, False), + ('sdmmc3_cd_n_pv2', 'sdmmc3', None, 'up', False, True, False, False), + ('clk_32k_out_pa0', None, 'in', 'none', False, True, False, False), + ('pwr_i2c_scl_pz6', 'i2cpwr', None, 'none', False, True, True, False), + ('pwr_i2c_sda_pz7', 'i2cpwr', None, 'none', False, True, True, False), + ('jtag_rtck', 'rtck', None, 'none', False, False, False, False), + ('clk_32k_in', 'clk', None, 'none', False, True, False, False), + ('core_pwr_req', 'pwron', None, 'none', False, False, False, False), + ('cpu_pwr_req', 'cpu', None, 'none', False, False, False, False), + ('pwr_int_n', 'pmi', None, 'none', False, True, False, False), + ('reset_out_n', 'reset_out_n', None, 'none', False, False, False, False), + ('clk3_out_pee0', 'extperiph3', None, 'none', False, False, False, False), + ('clk3_req_pee1', 'rsvd2', None, 'down', True, False, False, False), + ('dap4_din_pp5', 'i2s3', None, 'none', False, True, False, False), + ('dap4_dout_pp6', 'i2s3', None, 'none', False, False, False, False), + ('dap4_fs_pp4', 'i2s3', None, 'none', False, False, False, False), + ('dap4_sclk_pp7', 'i2s3', None, 'none', False, False, False, False), + ('gen1_i2c_scl_pc4', 'i2c1', None, 'none', False, True, True, False), + ('gen1_i2c_sda_pc5', 'i2c1', None, 'none', False, True, True, False), + ('pu0', 'uarta', None, 'none', False, False, False, False), + ('pu1', 'uarta', None, 'none', False, True, False, False), + ('pu2', 'uarta', None, 'none', False, True, False, False), + ('pu3', 'uarta', None, 'none', False, False, False, False), + ('pu4', None, 'in', 'none', False, True, False, False), + ('pu5', None, 'in', 'up', False, True, False, False), + ('pu6', None, 'in', 'up', False, True, False, False), + ('uart2_cts_n_pj5', 'uartb', None, 'none', False, True, False, False), + ('uart2_rts_n_pj6', 'uartb', None, 'none', False, False, False, False), + ('uart2_rxd_pc3', 'irda', None, 'none', False, True, False, False), + ('uart2_txd_pc2', 'irda', None, 'none', False, False, False, False), + ('uart3_cts_n_pa1', 'uartc', None, 'none', False, True, False, False), + ('uart3_rts_n_pc0', 'uartc', None, 'none', False, False, False, False), + ('uart3_rxd_pw7', 'uartc', None, 'none', False, True, False, False), + ('uart3_txd_pw6', 'uartc', None, 'none', False, False, False, False), + ('owr', 'rsvd2', None, 'down', True, False, False, False), + ('hdmi_cec_pee3', 'cec', None, 'none', False, True, True, False), + ('hdmi_int_pn7', None, 'in', 'down', False, True, False, False), + ('ddc_scl_pv4', 'i2c4', None, 'none', False, True, False, False), + ('ddc_sda_pv5', 'i2c4', None, 'none', False, True, False, False), + ('spdif_out_pk5', 'rsvd2', None, 'down', True, False, False, False), + ('spdif_in_pk6', None, 'out0', 'down', False, False, False, False), + ('usb_vbus_en0_pn4', 'usb', None, 'none', False, True, True, False), + ('usb_vbus_en1_pn5', 'usb', None, 'none', False, True, True, False), + ('dp_hpd_pff0', 'dp', None, 'up', False, True, False, False), +) + +drive_groups = ( +) |