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|
kernel_copyright_years = '2011-2012'
kernel_author = 'Stephen Warren <swarren@nvidia.com>'
uboot_copyright_years = '2010-2014'
soc_has_io_clamping = False
soc_combine_pin_drvgroup = False
soc_rsvd_base = 1
soc_drvgroups_have_drvtype = False
soc_drvgroups_have_hsm = True
soc_drvgroups_have_lpmd = True
soc_drvgroups_have_schmitt = True
soc_pins_all_have_od = False
soc_pins_all_have_parked = False
soc_pins_all_have_schmitt = False
soc_pins_have_drvtype = False
soc_pins_have_e_io_hv = False
soc_pins_have_hsm = False
soc_pins_have_ior = True
soc_pins_have_od = True
soc_pins_have_rcv_sel = False
soc_pins_have_schmitt = False
soc_drv_reg_base = 0x868
soc_einput_b = 5
soc_odrain_b = 6
soc_parked_bit = 0
gpios = (
#name, gpio, reg, f0, f1, f2, f3, od, ior
('clk_32k_out', 'a0', 0x331c, 'blink', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('uart3_cts_n', 'a1', 0x317c, 'uartc', 'rsvd2', 'gmi', 'rsvd4', False, False),
('dap2_fs', 'a2', 0x3358, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False),
('dap2_sclk', 'a3', 0x3364, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False),
('dap2_din', 'a4', 0x335c, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False),
('dap2_dout', 'a5', 0x3360, 'i2s1', 'hda', 'rsvd3', 'gmi', False, False),
('sdmmc3_clk', 'a6', 0x3390, 'uarta', 'pwm2', 'sdmmc3', 'spi3', False, False),
('sdmmc3_cmd', 'a7', 0x3394, 'uarta', 'pwm3', 'sdmmc3', 'spi2', False, False),
('gmi_a17', 'b0', 0x3234, 'uartd', 'spi4', 'gmi', 'dtv', False, False),
('gmi_a18', 'b1', 0x3238, 'uartd', 'spi4', 'gmi', 'dtv', False, False),
('lcd_pwr0', 'b2', 0x3090, 'displaya', 'displayb', 'spi5', 'hdcp', False, False),
('lcd_pclk', 'b3', 0x3094, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('sdmmc3_dat3', 'b4', 0x33a4, 'rsvd1', 'pwm0', 'sdmmc3', 'spi3', False, False),
('sdmmc3_dat2', 'b5', 0x33a0, 'rsvd1', 'pwm1', 'sdmmc3', 'spi3', False, False),
('sdmmc3_dat1', 'b6', 0x339c, 'rsvd1', 'rsvd2', 'sdmmc3', 'spi3', False, False),
('sdmmc3_dat0', 'b7', 0x3398, 'rsvd1', 'rsvd2', 'sdmmc3', 'spi3', False, False),
('uart3_rts_n', 'c0', 0x3180, 'uartc', 'pwm0', 'gmi', 'rsvd4', False, False),
('lcd_pwr1', 'c1', 0x3070, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('uart2_txd', 'c2', 0x3168, 'uartb', 'spdif', 'uarta', 'spi4', False, False),
('uart2_rxd', 'c3', 0x3164, 'uartb', 'spdif', 'uarta', 'spi4', False, False),
('gen1_i2c_scl', 'c4', 0x31a4, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False),
('gen1_i2c_sda', 'c5', 0x31a0, 'i2c1', 'rsvd2', 'rsvd3', 'rsvd4', True, False),
('lcd_pwr2', 'c6', 0x3074, 'displaya', 'displayb', 'spi5', 'hdcp', False, False),
('gmi_wp_n', 'c7', 0x31c0, 'rsvd1', 'nand', 'gmi', 'gmi_alt', False, False),
('sdmmc3_dat5', 'd0', 0x33ac, 'pwm0', 'spi4', 'sdmmc3', 'spi2', False, False),
('sdmmc3_dat4', 'd1', 0x33a8, 'pwm1', 'spi4', 'sdmmc3', 'spi2', False, False),
('lcd_dc1', 'd2', 0x310c, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('sdmmc3_dat6', 'd3', 0x33b0, 'spdif', 'spi4', 'sdmmc3', 'spi2', False, False),
('sdmmc3_dat7', 'd4', 0x33b4, 'spdif', 'spi4', 'sdmmc3', 'spi2', False, False),
('vi_d1', 'd5', 0x3128, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_vsync', 'd6', 0x315c, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True),
('vi_hsync', 'd7', 0x3160, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True),
('lcd_d0', 'e0', 0x30a4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d1', 'e1', 0x30a8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d2', 'e2', 0x30ac, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d3', 'e3', 0x30b0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d4', 'e4', 0x30b4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d5', 'e5', 0x30b8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d6', 'e6', 0x30bc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d7', 'e7', 0x30c0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d8', 'f0', 0x30c4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d9', 'f1', 0x30c8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d10', 'f2', 0x30cc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d11', 'f3', 0x30d0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d12', 'f4', 0x30d4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d13', 'f5', 0x30d8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d14', 'f6', 0x30dc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d15', 'f7', 0x30e0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('gmi_ad0', 'g0', 0x31f0, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad1', 'g1', 0x31f4, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad2', 'g2', 0x31f8, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad3', 'g3', 0x31fc, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad4', 'g4', 0x3200, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad5', 'g5', 0x3204, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad6', 'g6', 0x3208, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad7', 'g7', 0x320c, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad8', 'h0', 0x3210, 'pwm0', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad9', 'h1', 0x3214, 'pwm1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad10', 'h2', 0x3218, 'pwm2', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad11', 'h3', 0x321c, 'pwm3', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad12', 'h4', 0x3220, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad13', 'h5', 0x3224, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad14', 'h6', 0x3228, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_ad15', 'h7', 0x322c, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_wr_n', 'i0', 0x3240, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_oe_n', 'i1', 0x3244, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_dqs', 'i2', 0x3248, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_cs6_n', 'i3', 0x31e8, 'nand', 'nand_alt', 'gmi', 'sata', False, False),
('gmi_rst_n', 'i4', 0x324c, 'nand', 'nand_alt', 'gmi', 'rsvd4', False, False),
('gmi_iordy', 'i5', 0x31c4, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_cs7_n', 'i6', 0x31ec, 'nand', 'nand_alt', 'gmi', 'gmi_alt', False, False),
('gmi_wait', 'i7', 0x31c8, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_cs0_n', 'j0', 0x31d4, 'rsvd1', 'nand', 'gmi', 'dtv', False, False),
('lcd_de', 'j1', 0x3098, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('gmi_cs1_n', 'j2', 0x31d8, 'rsvd1', 'nand', 'gmi', 'dtv', False, False),
('lcd_hsync', 'j3', 0x309c, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_vsync', 'j4', 0x30a0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('uart2_cts_n', 'j5', 0x3170, 'uarta', 'uartb', 'gmi', 'spi4', False, False),
('uart2_rts_n', 'j6', 0x316c, 'uarta', 'uartb', 'gmi', 'spi4', False, False),
('gmi_a16', 'j7', 0x3230, 'uartd', 'spi4', 'gmi', 'gmi_alt', False, False),
('gmi_adv_n', 'k0', 0x31cc, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_clk', 'k1', 0x31d0, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_cs4_n', 'k2', 0x31e4, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_cs2_n', 'k3', 0x31dc, 'rsvd1', 'nand', 'gmi', 'rsvd4', False, False),
('gmi_cs3_n', 'k4', 0x31e0, 'rsvd1', 'nand', 'gmi', 'gmi_alt', False, False),
('spdif_out', 'k5', 0x3354, 'spdif', 'rsvd2', 'i2c1', 'sdmmc2', False, False),
('spdif_in', 'k6', 0x3350, 'spdif', 'hda', 'i2c1', 'sdmmc2', False, False),
('gmi_a19', 'k7', 0x323c, 'uartd', 'spi4', 'gmi', 'rsvd4', False, False),
('vi_d2', 'l0', 0x312c, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_d3', 'l1', 0x3130, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_d4', 'l2', 0x3134, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_d5', 'l3', 0x3138, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_d6', 'l4', 0x313c, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_d7', 'l5', 0x3140, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_d8', 'l6', 0x3144, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_d9', 'l7', 0x3148, 'ddr', 'sdmmc2', 'vi', 'rsvd4', False, True),
('lcd_d16', 'm0', 0x30e4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d17', 'm1', 0x30e8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d18', 'm2', 0x30ec, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d19', 'm3', 0x30f0, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d20', 'm4', 0x30f4, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d21', 'm5', 0x30f8, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d22', 'm6', 0x30fc, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('lcd_d23', 'm7', 0x3100, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('dap1_fs', 'n0', 0x3338, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False),
('dap1_din', 'n1', 0x333c, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False),
('dap1_dout', 'n2', 0x3340, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False),
('dap1_sclk', 'n3', 0x3344, 'i2s0', 'hda', 'gmi', 'sdmmc2', False, False),
('lcd_cs0_n', 'n4', 0x3084, 'displaya', 'displayb', 'spi5', 'rsvd4', False, False),
('lcd_sdout', 'n5', 0x307c, 'displaya', 'displayb', 'spi5', 'hdcp', False, False),
('lcd_dc0', 'n6', 0x3088, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('hdmi_int', 'n7', 0x3110, 'hdmi', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('ulpi_data7', 'o0', 0x301c, 'spi2', 'hsi', 'uarta', 'ulpi', False, False),
('ulpi_data0', 'o1', 0x3000, 'spi3', 'hsi', 'uarta', 'ulpi', False, False),
('ulpi_data1', 'o2', 0x3004, 'spi3', 'hsi', 'uarta', 'ulpi', False, False),
('ulpi_data2', 'o3', 0x3008, 'spi3', 'hsi', 'uarta', 'ulpi', False, False),
('ulpi_data3', 'o4', 0x300c, 'spi3', 'hsi', 'uarta', 'ulpi', False, False),
('ulpi_data4', 'o5', 0x3010, 'spi2', 'hsi', 'uarta', 'ulpi', False, False),
('ulpi_data5', 'o6', 0x3014, 'spi2', 'hsi', 'uarta', 'ulpi', False, False),
('ulpi_data6', 'o7', 0x3018, 'spi2', 'hsi', 'uarta', 'ulpi', False, False),
('dap3_fs', 'p0', 0x3030, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False),
('dap3_din', 'p1', 0x3034, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False),
('dap3_dout', 'p2', 0x3038, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False),
('dap3_sclk', 'p3', 0x303c, 'i2s2', 'rsvd2', 'displaya', 'displayb', False, False),
('dap4_fs', 'p4', 0x31a8, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False),
('dap4_din', 'p5', 0x31ac, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False),
('dap4_dout', 'p6', 0x31b0, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False),
('dap4_sclk', 'p7', 0x31b4, 'i2s3', 'rsvd2', 'gmi', 'rsvd4', False, False),
('kb_col0', 'q0', 0x32fc, 'kbc', 'nand', 'trace', 'test', False, False),
('kb_col1', 'q1', 0x3300, 'kbc', 'nand', 'trace', 'test', False, False),
('kb_col2', 'q2', 0x3304, 'kbc', 'nand', 'trace', 'rsvd4', False, False),
('kb_col3', 'q3', 0x3308, 'kbc', 'nand', 'trace', 'rsvd4', False, False),
('kb_col4', 'q4', 0x330c, 'kbc', 'nand', 'trace', 'rsvd4', False, False),
('kb_col5', 'q5', 0x3310, 'kbc', 'nand', 'trace', 'rsvd4', False, False),
('kb_col6', 'q6', 0x3314, 'kbc', 'nand', 'trace', 'mio', False, False),
('kb_col7', 'q7', 0x3318, 'kbc', 'nand', 'trace', 'mio', False, False),
('kb_row0', 'r0', 0x32bc, 'kbc', 'nand', 'rsvd3', 'rsvd4', False, False),
('kb_row1', 'r1', 0x32c0, 'kbc', 'nand', 'rsvd3', 'rsvd4', False, False),
('kb_row2', 'r2', 0x32c4, 'kbc', 'nand', 'rsvd3', 'rsvd4', False, False),
('kb_row3', 'r3', 0x32c8, 'kbc', 'nand', 'rsvd3', 'invalid', False, False),
('kb_row4', 'r4', 0x32cc, 'kbc', 'nand', 'trace', 'rsvd4', False, False),
('kb_row5', 'r5', 0x32d0, 'kbc', 'nand', 'trace', 'owr', False, False),
('kb_row6', 'r6', 0x32d4, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row7', 'r7', 0x32d8, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row8', 's0', 0x32dc, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row9', 's1', 0x32e0, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row10', 's2', 0x32e4, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row11', 's3', 0x32e8, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row12', 's4', 0x32ec, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row13', 's5', 0x32f0, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row14', 's6', 0x32f4, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('kb_row15', 's7', 0x32f8, 'kbc', 'nand', 'sdmmc2', 'mio', False, False),
('vi_pclk', 't0', 0x3154, 'rsvd1', 'sdmmc2', 'vi', 'rsvd4', False, True),
('vi_mclk', 't1', 0x3158, 'vi', 'vi_alt1', 'vi_alt2', 'vi_alt3', False, True),
('vi_d10', 't2', 0x314c, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True),
('vi_d11', 't3', 0x3150, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True),
('vi_d0', 't4', 0x3124, 'ddr', 'rsvd2', 'vi', 'rsvd4', False, True),
('gen2_i2c_scl', 't5', 0x3250, 'i2c2', 'hdcp', 'gmi', 'rsvd4', True, False),
('gen2_i2c_sda', 't6', 0x3254, 'i2c2', 'hdcp', 'gmi', 'rsvd4', True, False),
('sdmmc4_cmd', 't7', 0x325c, 'i2c3', 'nand', 'gmi', 'sdmmc4', False, True),
('', 'u0', 0x3184, 'owr', 'uarta', 'gmi', 'rsvd4', False, False),
('', 'u1', 0x3188, 'rsvd1', 'uarta', 'gmi', 'rsvd4', False, False),
('', 'u2', 0x318c, 'rsvd1', 'uarta', 'gmi', 'rsvd4', False, False),
('', 'u3', 0x3190, 'pwm0', 'uarta', 'gmi', 'rsvd4', False, False),
('', 'u4', 0x3194, 'pwm1', 'uarta', 'gmi', 'rsvd4', False, False),
('', 'u5', 0x3198, 'pwm2', 'uarta', 'gmi', 'rsvd4', False, False),
('', 'u6', 0x319c, 'pwm3', 'uarta', 'gmi', 'rsvd4', False, False),
('jtag_rtck', 'u7', 0x32b0, 'rtck', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('', 'v0', 0x3040, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('', 'v1', 0x3044, 'rsvd1', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('', 'v2', 0x3060, 'owr', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('', 'v3', 0x3064, 'clk_12m_out', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('ddc_scl', 'v4', 0x3114, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('ddc_sda', 'v5', 0x3118, 'i2c4', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('crt_hsync', 'v6', 0x311c, 'crt', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('crt_vsync', 'v7', 0x3120, 'crt', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('lcd_cs1_n', 'w0', 0x3104, 'displaya', 'displayb', 'spi5', 'rsvd4', False, False),
('lcd_m1', 'w1', 0x3108, 'displaya', 'displayb', 'rsvd3', 'rsvd4', False, False),
('spi2_cs1_n', 'w2', 0x3388, 'spi3', 'spi2', 'spi2_alt', 'i2c1', False, False),
('spi2_cs2_n', 'w3', 0x338c, 'spi3', 'spi2', 'spi2_alt', 'i2c1', False, False),
('clk1_out', 'w4', 0x334c, 'extperiph1', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('clk2_out', 'w5', 0x3068, 'extperiph2', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('uart3_txd', 'w6', 0x3174, 'uartc', 'rsvd2', 'gmi', 'rsvd4', False, False),
('uart3_rxd', 'w7', 0x3178, 'uartc', 'rsvd2', 'gmi', 'rsvd4', False, False),
('spi2_mosi', 'x0', 0x3368, 'spi6', 'spi2', 'spi3', 'gmi', False, False),
('spi2_miso', 'x1', 0x336c, 'spi6', 'spi2', 'spi3', 'gmi', False, False),
('spi2_sck', 'x2', 0x3374, 'spi6', 'spi2', 'spi3', 'gmi', False, False),
('spi2_cs0_n', 'x3', 0x3370, 'spi6', 'spi2', 'spi3', 'gmi', False, False),
('spi1_mosi', 'x4', 0x3378, 'spi2', 'spi1', 'spi2_alt', 'gmi', False, False),
('spi1_sck', 'x5', 0x337c, 'spi2', 'spi1', 'spi2_alt', 'gmi', False, False),
('spi1_cs0_n', 'x6', 0x3380, 'spi2', 'spi1', 'spi2_alt', 'gmi', False, False),
('spi1_miso', 'x7', 0x3384, 'spi3', 'spi1', 'spi2_alt', 'rsvd4', False, False),
('ulpi_clk', 'y0', 0x3020, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False),
('ulpi_dir', 'y1', 0x3024, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False),
('ulpi_nxt', 'y2', 0x3028, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False),
('ulpi_stp', 'y3', 0x302c, 'spi1', 'rsvd2', 'uartd', 'ulpi', False, False),
('sdmmc1_dat3', 'y4', 0x3050, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False),
('sdmmc1_dat2', 'y5', 0x3054, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False),
('sdmmc1_dat1', 'y6', 0x3058, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False),
('sdmmc1_dat0', 'y7', 0x305c, 'sdmmc1', 'rsvd2', 'uarte', 'uarta', False, False),
('sdmmc1_clk', 'z0', 0x3048, 'sdmmc1', 'rsvd2', 'rsvd3', 'uarta', False, False),
('sdmmc1_cmd', 'z1', 0x304c, 'sdmmc1', 'rsvd2', 'rsvd3', 'uarta', False, False),
('lcd_sdin', 'z2', 0x3078, 'displaya', 'displayb', 'spi5', 'rsvd4', False, False),
('lcd_wr_n', 'z3', 0x3080, 'displaya', 'displayb', 'spi5', 'hdcp', False, False),
('lcd_sck', 'z4', 0x308c, 'displaya', 'displayb', 'spi5', 'hdcp', False, False),
('sys_clk_req', 'z5', 0x3320, 'sysclk', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('pwr_i2c_scl', 'z6', 0x32b4, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False),
('pwr_i2c_sda', 'z7', 0x32b8, 'i2cpwr', 'rsvd2', 'rsvd3', 'rsvd4', True, False),
('sdmmc4_dat0', 'aa0', 0x3260, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True),
('sdmmc4_dat1', 'aa1', 0x3264, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True),
('sdmmc4_dat2', 'aa2', 0x3268, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True),
('sdmmc4_dat3', 'aa3', 0x326c, 'uarte', 'spi3', 'gmi', 'sdmmc4', False, True),
('sdmmc4_dat4', 'aa4', 0x3270, 'i2c3', 'i2s4', 'gmi', 'sdmmc4', False, True),
('sdmmc4_dat5', 'aa5', 0x3274, 'vgp3', 'i2s4', 'gmi', 'sdmmc4', False, True),
('sdmmc4_dat6', 'aa6', 0x3278, 'vgp4', 'i2s4', 'gmi', 'sdmmc4', False, True),
('sdmmc4_dat7', 'aa7', 0x327c, 'vgp5', 'i2s4', 'gmi', 'sdmmc4', False, True),
('', 'bb0', 0x328c, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc4', False, False),
('cam_i2c_scl', 'bb1', 0x3290, 'vgp1', 'i2c3', 'rsvd3', 'sdmmc4', True, False),
('cam_i2c_sda', 'bb2', 0x3294, 'vgp2', 'i2c3', 'rsvd3', 'sdmmc4', True, False),
('', 'bb3', 0x3298, 'vgp3', 'displaya', 'displayb', 'sdmmc4', False, False),
('', 'bb4', 0x329c, 'vgp4', 'displaya', 'displayb', 'sdmmc4', False, False),
('', 'bb5', 0x32a0, 'vgp5', 'displaya', 'displayb', 'sdmmc4', False, False),
('', 'bb6', 0x32a4, 'vgp6', 'displaya', 'displayb', 'sdmmc4', False, False),
('', 'bb7', 0x32a8, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc4', False, False),
('cam_mclk', 'cc0', 0x3284, 'vi', 'vi_alt1', 'vi_alt3', 'sdmmc4', False, False),
('', 'cc1', 0x3288, 'i2s4', 'rsvd2', 'rsvd3', 'sdmmc4', False, False),
('', 'cc2', 0x32ac, 'i2s4', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('sdmmc4_rst_n', 'cc3', 0x3280, 'vgp6', 'rsvd2', 'rsvd3', 'sdmmc4', False, True),
('sdmmc4_clk', 'cc4', 0x3258, 'invalid', 'nand', 'gmi', 'sdmmc4', False, True),
('clk2_req', 'cc5', 0x306c, 'dap', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('pex_l2_rst_n', 'cc6', 0x33d8, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l2_clkreq_n', 'cc7', 0x33dc, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l0_prsnt_n', 'dd0', 0x33b8, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l0_rst_n', 'dd1', 0x33bc, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l0_clkreq_n', 'dd2', 0x33c0, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_wake_n', 'dd3', 0x33c4, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l1_prsnt_n', 'dd4', 0x33c8, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l1_rst_n', 'dd5', 0x33cc, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l1_clkreq_n', 'dd6', 0x33d0, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('pex_l2_prsnt_n', 'dd7', 0x33d4, 'pcie', 'hda', 'rsvd3', 'rsvd4', False, False),
('clk3_out', 'ee0', 0x31b8, 'extperiph3', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('clk3_req', 'ee1', 0x31bc, 'dev3', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('clk1_req', 'ee2', 0x3348, 'dap', 'hda', 'rsvd3', 'rsvd4', False, False),
('hdmi_cec', 'ee3', 0x33e0, 'cec', 'rsvd2', 'rsvd3', 'rsvd4', True, False),
('', 'ee4'),
('', 'ee5'),
('', 'ee6'),
('', 'ee7'),
)
pins = (
#name, reg, f0, f1, f2, f3, od, ior
('clk_32k_in', 0x3330, 'clk_32k_in', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('core_pwr_req', 0x3324, 'core_pwr_req', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('cpu_pwr_req', 0x3328, 'cpu_pwr_req', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('jtag_tck', ),
('jtag_tdi', ),
('jtag_tdo', ),
('jtag_tms', ),
('jtag_trst_n', ),
('owr', 0x3334, 'owr', 'cec', 'rsvd3', 'rsvd4', False, False),
('pwr_int_n', 0x332c, 'pwr_int_n', 'rsvd2', 'rsvd3', 'rsvd4', False, False),
('sys_reset_n', ),
('test_mode_en', ),
)
drive_groups = (
#name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w
('ao1', 0x868, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('ao2', 0x86c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('at1', 0x870, 2, 3, 4, 14, 5, 19, 5, 24, 2, 28, 2),
('at2', 0x874, 2, 3, 4, 14, 5, 19, 5, 24, 2, 28, 2),
('at3', 0x878, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2),
('at4', 0x87c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2),
('at5', 0x880, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2),
('cdev1', 0x884, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('cdev2', 0x888, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('cec', 0x938, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('crt', 0x8f8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('csus', 0x88c, -1, -1, -1, 12, 5, 19, 5, 24, 4, 28, 4),
('dap1', 0x890, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('dap2', 0x894, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('dap3', 0x898, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('dap4', 0x89c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('dbg', 0x8a0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('ddc', 0x8fc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('dev3', 0x92c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('gma', 0x900, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4),
('gmb', 0x904, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4),
('gmc', 0x908, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4),
('gmd', 0x90c, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4),
('gme', 0x910, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2),
('gmf', 0x914, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2),
('gmg', 0x918, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2),
('gmh', 0x91c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2),
('gpv', 0x928, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('lcd1', 0x8a4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('lcd2', 0x8a8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('owr', 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('sdio1', 0x8ec, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2),
('sdio2', 0x8ac, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2),
('sdio3', 0x8b0, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2),
('spi', 0x8b4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('uaa', 0x8b8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('uab', 0x8bc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('uart2', 0x8c0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('uart3', 0x8c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('uda', 0x924, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
('vi1', 0x8c8, -1, -1, -1, 14, 5, 19, 5, 24, 4, 28, 4),
)
drive_group_pins = {
'ao1': (
'kb_row0_pr0',
'kb_row1_pr1',
'kb_row2_pr2',
'kb_row3_pr3',
'kb_row4_pr4',
'kb_row5_pr5',
'kb_row6_pr6',
'kb_row7_pr7',
'pwr_i2c_scl_pz6',
'pwr_i2c_sda_pz7',
'sys_reset_n',
),
'ao2': (
'clk_32k_out_pa0',
'kb_col0_pq0',
'kb_col1_pq1',
'kb_col2_pq2',
'kb_col3_pq3',
'kb_col4_pq4',
'kb_col5_pq5',
'kb_col6_pq6',
'kb_col7_pq7',
'kb_row8_ps0',
'kb_row9_ps1',
'kb_row10_ps2',
'kb_row11_ps3',
'kb_row12_ps4',
'kb_row13_ps5',
'kb_row14_ps6',
'kb_row15_ps7',
'sys_clk_req_pz5',
'clk_32k_in',
'core_pwr_req',
'cpu_pwr_req',
'pwr_int_n',
),
'at1': (
'gmi_ad8_ph0',
'gmi_ad9_ph1',
'gmi_ad10_ph2',
'gmi_ad11_ph3',
'gmi_ad12_ph4',
'gmi_ad13_ph5',
'gmi_ad14_ph6',
'gmi_ad15_ph7',
'gmi_iordy_pi5',
'gmi_cs7_n_pi6',
),
'at2': (
'gmi_ad0_pg0',
'gmi_ad1_pg1',
'gmi_ad2_pg2',
'gmi_ad3_pg3',
'gmi_ad4_pg4',
'gmi_ad5_pg5',
'gmi_ad6_pg6',
'gmi_ad7_pg7',
'gmi_wr_n_pi0',
'gmi_oe_n_pi1',
'gmi_dqs_pi2',
'gmi_cs6_n_pi3',
'gmi_rst_n_pi4',
'gmi_wait_pi7',
'gmi_adv_n_pk0',
'gmi_clk_pk1',
'gmi_cs4_n_pk2',
'gmi_cs2_n_pk3',
'gmi_cs3_n_pk4',
),
'at3': (
'gmi_wp_n_pc7',
'gmi_cs0_n_pj0',
),
'at4': (
'gmi_a17_pb0',
'gmi_a18_pb1',
'gmi_cs1_n_pj2',
'gmi_a16_pj7',
'gmi_a19_pk7',
),
'at5': (
'gen2_i2c_scl_pt5',
'gen2_i2c_sda_pt6',
),
'cdev1': (
'clk1_out_pw4',
'clk1_req_pee2',
),
'cdev2': (
'clk2_out_pw5',
'clk2_req_pcc5',
),
'cec': (
'hdmi_cec_pee3',
),
'crt': (
'crt_hsync_pv6',
'crt_vsync_pv7',
),
'csus': (
'vi_mclk_pt1',
),
'dap1': (
'spdif_out_pk5',
'spdif_in_pk6',
'dap1_fs_pn0',
'dap1_din_pn1',
'dap1_dout_pn2',
'dap1_sclk_pn3',
),
'dap2': (
'dap2_fs_pa2',
'dap2_sclk_pa3',
'dap2_din_pa4',
'dap2_dout_pa5',
),
'dap3': (
'dap3_fs_pp0',
'dap3_din_pp1',
'dap3_dout_pp2',
'dap3_sclk_pp3',
),
'dap4': (
'dap4_fs_pp4',
'dap4_din_pp5',
'dap4_dout_pp6',
'dap4_sclk_pp7',
),
'dbg': (
'gen1_i2c_scl_pc4',
'gen1_i2c_sda_pc5',
'pu0',
'pu1',
'pu2',
'pu3',
'pu4',
'pu5',
'pu6',
'jtag_rtck_pu7',
'jtag_tck',
'jtag_tdi',
'jtag_tdo',
'jtag_tms',
'jtag_trst_n',
'test_mode_en',
),
'ddc': (
'ddc_scl_pv4',
'ddc_sda_pv5',
),
'dev3': (
'clk3_out_pee0',
'clk3_req_pee1',
),
'gma': (
'sdmmc4_dat0_paa0',
'sdmmc4_dat1_paa1',
'sdmmc4_dat2_paa2',
'sdmmc4_dat3_paa3',
'sdmmc4_rst_n_pcc3',
),
'gmb': (
'sdmmc4_dat4_paa4',
'sdmmc4_dat5_paa5',
'sdmmc4_dat6_paa6',
'sdmmc4_dat7_paa7',
),
'gmc': (
'sdmmc4_clk_pcc4',
),
'gmd': (
'sdmmc4_cmd_pt7',
),
'gme': (
'pbb0',
'cam_i2c_scl_pbb1',
'cam_i2c_sda_pbb2',
'pbb3',
'pcc2',
),
'gmf': (
'pbb4',
'pbb5',
'pbb6',
'pbb7',
),
'gmg': (
'cam_mclk_pcc0',
),
'gmh': (
'pcc1',
),
'gpv': (
'pex_l2_rst_n_pcc6',
'pex_l2_clkreq_n_pcc7',
'pex_l0_prsnt_n_pdd0',
'pex_l0_rst_n_pdd1',
'pex_l0_clkreq_n_pdd2',
'pex_wake_n_pdd3',
'pex_l1_prsnt_n_pdd4',
'pex_l1_rst_n_pdd5',
'pex_l1_clkreq_n_pdd6',
'pex_l2_prsnt_n_pdd7',
),
'lcd1': (
'lcd_pwr1_pc1',
'lcd_pwr2_pc6',
'lcd_cs0_n_pn4',
'lcd_sdout_pn5',
'lcd_dc0_pn6',
'lcd_sdin_pz2',
'lcd_wr_n_pz3',
'lcd_sck_pz4',
),
'lcd2': (
'lcd_pwr0_pb2',
'lcd_pclk_pb3',
'lcd_dc1_pd2',
'lcd_d0_pe0',
'lcd_d1_pe1',
'lcd_d2_pe2',
'lcd_d3_pe3',
'lcd_d4_pe4',
'lcd_d5_pe5',
'lcd_d6_pe6',
'lcd_d7_pe7',
'lcd_d8_pf0',
'lcd_d9_pf1',
'lcd_d10_pf2',
'lcd_d11_pf3',
'lcd_d12_pf4',
'lcd_d13_pf5',
'lcd_d14_pf6',
'lcd_d15_pf7',
'lcd_de_pj1',
'lcd_hsync_pj3',
'lcd_vsync_pj4',
'lcd_d16_pm0',
'lcd_d17_pm1',
'lcd_d18_pm2',
'lcd_d19_pm3',
'lcd_d20_pm4',
'lcd_d21_pm5',
'lcd_d22_pm6',
'lcd_d23_pm7',
'hdmi_int_pn7',
'lcd_cs1_n_pw0',
'lcd_m1_pw1',
),
'owr': (
'owr',
),
'sdio1': (
'sdmmc1_dat3_py4',
'sdmmc1_dat2_py5',
'sdmmc1_dat1_py6',
'sdmmc1_dat0_py7',
'sdmmc1_clk_pz0',
'sdmmc1_cmd_pz1',
),
'sdio2': (
'sdmmc3_dat5_pd0',
'sdmmc3_dat4_pd1',
'sdmmc3_dat6_pd3',
'sdmmc3_dat7_pd4',
),
'sdio3': (
'sdmmc3_clk_pa6',
'sdmmc3_cmd_pa7',
'sdmmc3_dat3_pb4',
'sdmmc3_dat2_pb5',
'sdmmc3_dat1_pb6',
'sdmmc3_dat0_pb7',
),
'spi': (
'spi2_cs1_n_pw2',
'spi2_cs2_n_pw3',
'spi2_mosi_px0',
'spi2_miso_px1',
'spi2_sck_px2',
'spi2_cs0_n_px3',
'spi1_mosi_px4',
'spi1_sck_px5',
'spi1_cs0_n_px6',
'spi1_miso_px7',
),
'uaa': (
'ulpi_data0_po1',
'ulpi_data1_po2',
'ulpi_data2_po3',
'ulpi_data3_po4',
),
'uab': (
'ulpi_data7_po0',
'ulpi_data4_po5',
'ulpi_data5_po6',
'ulpi_data6_po7',
'pv0',
'pv1',
'pv2',
'pv3',
),
'uart2': (
'uart2_txd_pc2',
'uart2_rxd_pc3',
'uart2_cts_n_pj5',
'uart2_rts_n_pj6',
),
'uart3': (
'uart3_cts_n_pa1',
'uart3_rts_n_pc0',
'uart3_txd_pw6',
'uart3_rxd_pw7',
),
'uda': (
'ulpi_clk_py0',
'ulpi_dir_py1',
'ulpi_nxt_py2',
'ulpi_stp_py3',
),
'vi1': (
'vi_d1_pd5',
'vi_vsync_pd6',
'vi_hsync_pd7',
'vi_d2_pl0',
'vi_d3_pl1',
'vi_d4_pl2',
'vi_d5_pl3',
'vi_d6_pl4',
'vi_d7_pl5',
'vi_d8_pl6',
'vi_d9_pl7',
'vi_pclk_pt0',
'vi_d10_pt2',
'vi_d11_pt3',
'vi_d0_pt4',
),
}
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