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| author | Stephen Warren <swarren@nvidia.com> | 2015-08-05 14:10:08 -0600 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2015-08-05 14:11:22 -0600 |
| commit | 098a4a086a581d1cfff0bca13d60b1dcf6f8b1ed (patch) | |
| tree | fd064dd44dbb8d834001ee6e209e9a6404df22fe | |
| parent | cf91845a69c955858faec5e6dc5208248bda2a65 (diff) | |
| download | tegra-uboot-flasher-scripts-098a4a086a581d1cfff0bca13d60b1dcf6f8b1ed.tar.gz | |
Fix comment re: meaning of 0x00108000 constant
This is the SPL base (which is essentially constant), not the base of
the main CCPLEX binary (which varies according to the size needs of the
SPL image).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
| -rwxr-xr-x | tegra-uboot-flasher | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tegra-uboot-flasher b/tegra-uboot-flasher index d80aa0d..4809665 100755 --- a/tegra-uboot-flasher +++ b/tegra-uboot-flasher @@ -87,7 +87,7 @@ gen_flashcmds = { } def get_loadaddr(): - # 0x00108000 is CONFIG_SYS_TEXT_BASE in U-Boot, minus RAM base + # 0x00108000 is CONFIG_SPL_TEXT_BASE in U-Boot, minus RAM base return soc['ram-base'] + 0x00108000 def gen_tegrarcm_cmd(bootloader, loadaddr): |