diff options
author | Justin Pettit <jpettit@ovn.org> | 2016-06-23 17:54:26 -0700 |
---|---|---|
committer | Justin Pettit <jpettit@ovn.org> | 2016-07-12 21:14:02 -0700 |
commit | 847b8b027af4401c8f1aff5e201a9cc84bb5fddb (patch) | |
tree | 82e5bb63af87caa4d45e85d8182ac37ea85f5103 /include/openvswitch/meta-flow.h | |
parent | 94300e095b4ae9d866bef402c1aebe4a2d3e8502 (diff) | |
download | openvswitch-847b8b027af4401c8f1aff5e201a9cc84bb5fddb.tar.gz |
Increase number of registers to 16.
With eight 32-bit registers, we can only store two IPv6 addresses, which is
pretty tight.
Signed-off-by: Justin Pettit <jpettit@ovn.org>
Acked-by: Ben Pfaff <blp@ovn.org>
Diffstat (limited to 'include/openvswitch/meta-flow.h')
-rw-r--r-- | include/openvswitch/meta-flow.h | 41 |
1 files changed, 32 insertions, 9 deletions
diff --git a/include/openvswitch/meta-flow.h b/include/openvswitch/meta-flow.h index 84a0946d1..828c40cc1 100644 --- a/include/openvswitch/meta-flow.h +++ b/include/openvswitch/meta-flow.h @@ -255,7 +255,7 @@ struct match; * field. * * Finally, a few "register" fields have very similar names and purposes, - * e.g. MFF_REG0 through MFF_REG7. For these, the comments may be merged + * e.g. MFF_REG0 through MFF_REG15. For these, the comments may be merged * together using <N> as a metasyntactic variable for the numeric suffix. * Lines in the comment that are specific to one of the particular fields by * writing, e.g. <1>, to consider that line only for e.g. MFF_REG1. @@ -842,7 +842,7 @@ enum OVS_PACKED_ENUM mf_field_id { */ MFF_CT_LABEL, -#if FLOW_N_REGS == 8 +#if FLOW_N_REGS == 16 /* "reg<N>". * * Nicira extension scratch pad register with initial value 0. @@ -860,6 +860,14 @@ enum OVS_PACKED_ENUM mf_field_id { * NXM: NXM_NX_REG5(5) since v1.7. <5> * NXM: NXM_NX_REG6(6) since v1.7. <6> * NXM: NXM_NX_REG7(7) since v1.7. <7> + * NXM: NXM_NX_REG8(8) since v2.6. <8> + * NXM: NXM_NX_REG9(9) since v2.6. <9> + * NXM: NXM_NX_REG10(10) since v2.6. <10> + * NXM: NXM_NX_REG11(11) since v2.6. <11> + * NXM: NXM_NX_REG12(12) since v2.6. <12> + * NXM: NXM_NX_REG13(13) since v2.6. <13> + * NXM: NXM_NX_REG14(14) since v2.6. <14> + * NXM: NXM_NX_REG15(15) since v2.6. <15> * OXM: none. */ MFF_REG0, @@ -870,11 +878,19 @@ enum OVS_PACKED_ENUM mf_field_id { MFF_REG5, MFF_REG6, MFF_REG7, + MFF_REG8, + MFF_REG9, + MFF_REG10, + MFF_REG11, + MFF_REG12, + MFF_REG13, + MFF_REG14, + MFF_REG15, #else #error "Need to update MFF_REG* to match FLOW_N_REGS" #endif -#if FLOW_N_XREGS == 4 +#if FLOW_N_XREGS == 8 /* "xreg<N>". * * OpenFlow 1.5 ``extended register". Each extended register @@ -899,6 +915,10 @@ enum OVS_PACKED_ENUM mf_field_id { MFF_XREG1, MFF_XREG2, MFF_XREG3, + MFF_XREG4, + MFF_XREG5, + MFF_XREG6, + MFF_XREG7, #else #error "Need to update MFF_REG* to match FLOW_N_XREGS" #endif @@ -1731,19 +1751,22 @@ struct mf_bitmap { /* Use this macro as CASE_MFF_REGS: in a switch statement to choose all of the * MFF_REGn cases. */ -#if FLOW_N_REGS == 8 -#define CASE_MFF_REGS \ - case MFF_REG0: case MFF_REG1: case MFF_REG2: case MFF_REG3: \ - case MFF_REG4: case MFF_REG5: case MFF_REG6: case MFF_REG7 +#if FLOW_N_REGS ==16 +#define CASE_MFF_REGS \ + case MFF_REG0: case MFF_REG1: case MFF_REG2: case MFF_REG3: \ + case MFF_REG4: case MFF_REG5: case MFF_REG6: case MFF_REG7: \ + case MFF_REG8: case MFF_REG9: case MFF_REG10: case MFF_REG11: \ + case MFF_REG12: case MFF_REG13: case MFF_REG14: case MFF_REG15 #else #error "Need to update CASE_MFF_REGS to match FLOW_N_REGS" #endif /* Use this macro as CASE_MFF_XREGS: in a switch statement to choose all of the * MFF_REGn cases. */ -#if FLOW_N_XREGS == 4 +#if FLOW_N_XREGS == 8 #define CASE_MFF_XREGS \ - case MFF_XREG0: case MFF_XREG1: case MFF_XREG2: case MFF_XREG3 + case MFF_XREG0: case MFF_XREG1: case MFF_XREG2: case MFF_XREG3: \ + case MFF_XREG4: case MFF_XREG5: case MFF_XREG6: case MFF_XREG7 #else #error "Need to update CASE_MFF_XREGS to match FLOW_N_XREGS" #endif |