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| author | Jeffrey Walton <noloader@gmail.com> | 2022-01-20 21:50:44 -0500 |
|---|---|---|
| committer | Ilya Maximets <i.maximets@ovn.org> | 2022-07-01 19:45:10 +0200 |
| commit | 7d746f76450db6f1d546fe6b13f6c9935a5be810 (patch) | |
| tree | 20af23702d5a45a48575ec20f8ecdfd1d3d3502f /lib/util.h | |
| parent | 7045e91a9cbd2666a39c579f6158c8430e7df27e (diff) | |
| download | openvswitch-7d746f76450db6f1d546fe6b13f6c9935a5be810.tar.gz | |
util: Update cache line size on PowerPC.
PPC64 machines have a 128-byte L1 cache line size.
See http://lists.llvm.org/pipermail/llvm-dev/2017-March/110982.html
Submitted-at: https://github.com/openvswitch/ovs/pull/379
Signed-off-by: Jeffrey Walton <noloader@gmail.com>
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Diffstat (limited to 'lib/util.h')
| -rw-r--r-- | lib/util.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/util.h b/lib/util.h index aea19d45f..9ff84b3dc 100644 --- a/lib/util.h +++ b/lib/util.h @@ -66,7 +66,13 @@ struct Bad_arg_to_ARRAY_SIZE { /* This system's cache line size, in bytes. * Being wrong hurts performance but not correctness. */ +#if defined(__ppc64__) || defined(__powerpc64__) || \ + defined(__PPC64__) || defined(_ARCH_PPC64) +/* http://lists.llvm.org/pipermail/llvm-dev/2017-March/110982.html */ +#define CACHE_LINE_SIZE 128 +#else #define CACHE_LINE_SIZE 64 +#endif BUILD_ASSERT_DECL(IS_POW2(CACHE_LINE_SIZE)); /* Cacheline marking is typically done using zero-sized array. |