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path: root/target/linux/bcm53xx/patches-5.10/033-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch
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Diffstat (limited to 'target/linux/bcm53xx/patches-5.10/033-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch')
-rw-r--r--target/linux/bcm53xx/patches-5.10/033-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch386
1 files changed, 0 insertions, 386 deletions
diff --git a/target/linux/bcm53xx/patches-5.10/033-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch b/target/linux/bcm53xx/patches-5.10/033-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch
deleted file mode 100644
index 6b473911ab..0000000000
--- a/target/linux/bcm53xx/patches-5.10/033-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch
+++ /dev/null
@@ -1,386 +0,0 @@
-From 702a8f4744ed5b480f2b2411858184afdb10f9fd Mon Sep 17 00:00:00 2001
-From: Matthew Hagan <mnhagan88@gmail.com>
-Date: Fri, 6 Aug 2021 21:44:35 +0100
-Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX65 series
-
-MX65 & MX65W Hardware info:
- - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
- - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
- - Storage: 1 GB (Micron MT29F8G08ABACA)
- - Networking: BCM58625 switch (2x 1GbE ports)
- 2x Qualcomm QCA8337 switches (10x 1GbE ports total)
- - PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12
- - USB: 1x USB2.0
- - Serial: Internal header
- - WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus.
-
-Note that a driver and firmware image for the BCM59111 PSE has been
-released under GPL, but this is not present in the kernel.
-
-Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/Makefile | 2 +
- arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 279 ++++++++++++++++++
- arch/arm/boot/dts/bcm958625-meraki-mx65.dts | 24 ++
- arch/arm/boot/dts/bcm958625-meraki-mx65w.dts | 32 ++
- 4 files changed, 337 insertions(+)
- create mode 100644 arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
- create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65.dts
- create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65w.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -163,6 +163,8 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
- bcm958625-meraki-mx64-a0.dtb \
- bcm958625-meraki-mx64w.dtb \
- bcm958625-meraki-mx64w-a0.dtb \
-+ bcm958625-meraki-mx65.dtb \
-+ bcm958625-meraki-mx65w.dtb \
- bcm958625hr.dtb \
- bcm988312hr.dtb \
- bcm958625k.dtb
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
-@@ -0,0 +1,279 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+/*
-+ * Device Tree Bindings for Cisco Meraki MX65 series (Alamo).
-+ *
-+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
-+ */
-+
-+#include "bcm958625-meraki-mx6x-common.dtsi"
-+
-+/ {
-+ keys {
-+ compatible = "gpio-keys-polled";
-+ autorepeat;
-+ poll-interval = <20>;
-+
-+ reset {
-+ label = "reset";
-+ linux,code = <KEY_RESTART>;
-+ gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
-+ };
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ led-0 {
-+ /* green:wan1-left */
-+ function = LED_FUNCTION_ACTIVITY;
-+ function-enumerator = <0>;
-+ color = <LED_COLOR_ID_GREEN>;
-+ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
-+ };
-+
-+ led-1 {
-+ /* green:wan1-right */
-+ function = LED_FUNCTION_ACTIVITY;
-+ function-enumerator = <1>;
-+ color = <LED_COLOR_ID_GREEN>;
-+ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
-+ };
-+
-+ led-2 {
-+ /* green:wan2-left */
-+ function = LED_FUNCTION_ACTIVITY;
-+ function-enumerator = <2>;
-+ color = <LED_COLOR_ID_GREEN>;
-+ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
-+ };
-+
-+ led-3 {
-+ /* green:wan2-right */
-+ function = LED_FUNCTION_ACTIVITY;
-+ function-enumerator = <3>;
-+ color = <LED_COLOR_ID_GREEN>;
-+ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
-+ };
-+
-+ led-4 {
-+ /* amber:power */
-+ function = LED_FUNCTION_POWER;
-+ color = <LED_COLOR_ID_AMBER>;
-+ gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
-+ default-state = "on";
-+ };
-+
-+ led-5 {
-+ /* white:status */
-+ function = LED_FUNCTION_STATUS;
-+ color = <LED_COLOR_ID_WHITE>;
-+ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
-+ };
-+ };
-+
-+ mdio-mii-mux {
-+ compatible = "mdio-mux-mmioreg";
-+ reg = <0x1803f1c0 0x4>;
-+ mux-mask = <0x2000>;
-+ mdio-parent-bus = <&mdio_ext>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ mdio@0 {
-+ reg = <0x0>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ phy_port6: phy@0 {
-+ reg = <0>;
-+ };
-+
-+ phy_port7: phy@1 {
-+ reg = <1>;
-+ };
-+
-+ phy_port8: phy@2 {
-+ reg = <2>;
-+ };
-+
-+ phy_port9: phy@3 {
-+ reg = <3>;
-+ };
-+
-+ phy_port10: phy@4 {
-+ reg = <4>;
-+ };
-+
-+ switch@10 {
-+ compatible = "qca,qca8337";
-+ reg = <0x10>;
-+ dsa,member = <1 0>;
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ port@0 {
-+ reg = <0>;
-+ ethernet = <&sgmii1>;
-+ phy-mode = "sgmii";
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ };
-+ };
-+
-+ port@1 {
-+ reg = <1>;
-+ label = "lan8";
-+ phy-handle = <&phy_port6>;
-+ };
-+
-+ port@2 {
-+ reg = <2>;
-+ label = "lan9";
-+ phy-handle = <&phy_port7>;
-+ };
-+
-+ port@3 {
-+ reg = <3>;
-+ label = "lan10";
-+ phy-handle = <&phy_port8>;
-+ };
-+
-+ port@4 {
-+ reg = <4>;
-+ label = "lan11";
-+ phy-handle = <&phy_port9>;
-+ };
-+
-+ port@5 {
-+ reg = <5>;
-+ label = "lan12";
-+ phy-handle = <&phy_port10>;
-+ };
-+ };
-+ };
-+ };
-+
-+ mdio-mii@2000 {
-+ reg = <0x2000>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ phy_port1: phy@0 {
-+ reg = <0>;
-+ };
-+
-+ phy_port2: phy@1 {
-+ reg = <1>;
-+ };
-+
-+ phy_port3: phy@2 {
-+ reg = <2>;
-+ };
-+
-+ phy_port4: phy@3 {
-+ reg = <3>;
-+ };
-+
-+ phy_port5: phy@4 {
-+ reg = <4>;
-+ };
-+
-+ switch@10 {
-+ compatible = "qca,qca8337";
-+ reg = <0x10>;
-+ dsa,member = <2 0>;
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ port@0 {
-+ reg = <0>;
-+ ethernet = <&sgmii0>;
-+ phy-mode = "sgmii";
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ };
-+ };
-+
-+ port@1 {
-+ reg = <1>;
-+ label = "lan3";
-+ phy-handle = <&phy_port1>;
-+ };
-+
-+ port@2 {
-+ reg = <2>;
-+ label = "lan4";
-+ phy-handle = <&phy_port2>;
-+ };
-+
-+ port@3 {
-+ reg = <3>;
-+ label = "lan5";
-+ phy-handle = <&phy_port3>;
-+ };
-+
-+ port@4 {
-+ reg = <4>;
-+ label = "lan6";
-+ phy-handle = <&phy_port4>;
-+ };
-+
-+ port@5 {
-+ reg = <5>;
-+ label = "lan7";
-+ phy-handle = <&phy_port5>;
-+ };
-+ };
-+ };
-+ };
-+ };
-+};
-+
-+&srab {
-+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
-+ status = "okay";
-+ dsa,member = <0 0>;
-+
-+ ports {
-+ port@0 {
-+ label = "wan1";
-+ reg = <0>;
-+ };
-+
-+ port@1 {
-+ label = "wan2";
-+ reg = <1>;
-+ };
-+
-+ sgmii0: port@4 {
-+ label = "sw0";
-+ reg = <4>;
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ };
-+ };
-+
-+ sgmii1: port@5 {
-+ label = "sw1";
-+ reg = <5>;
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ };
-+ };
-+
-+ port@8 {
-+ ethernet = <&amac2>;
-+ reg = <8>;
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ };
-+ };
-+ };
-+};
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm958625-meraki-mx65.dts
-@@ -0,0 +1,24 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+/*
-+ * Device Tree Bindings for Cisco Meraki MX65.
-+ *
-+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm958625-meraki-alamo.dtsi"
-+
-+/ {
-+ model = "Cisco Meraki MX65";
-+ compatible = "meraki,mx65", "brcm,bcm58625", "brcm,nsp";
-+
-+ chosen {
-+ stdout-path = "serial0:115200n8";
-+ };
-+
-+ memory@60000000 {
-+ device_type = "memory";
-+ reg = <0x60000000 0x80000000>;
-+ };
-+};
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm958625-meraki-mx65w.dts
-@@ -0,0 +1,32 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+/*
-+ * Device Tree Bindings for Cisco Meraki MX65W.
-+ *
-+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm958625-meraki-alamo.dtsi"
-+
-+/ {
-+ model = "Cisco Meraki MX65W";
-+ compatible = "meraki,mx65w", "brcm,bcm58625", "brcm,nsp";
-+
-+ chosen {
-+ stdout-path = "serial0:115200n8";
-+ };
-+
-+ memory@60000000 {
-+ device_type = "memory";
-+ reg = <0x60000000 0x80000000>;
-+ };
-+};
-+
-+&pcie0 {
-+ status = "okay";
-+};
-+
-+&pcie1 {
-+ status = "okay";
-+};
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