diff options
Diffstat (limited to 'target/linux/realtek/dts-5.10/rtl8382_panasonic_m24eg-pn28240k.dts')
| -rw-r--r-- | target/linux/realtek/dts-5.10/rtl8382_panasonic_m24eg-pn28240k.dts | 190 |
1 files changed, 0 insertions, 190 deletions
diff --git a/target/linux/realtek/dts-5.10/rtl8382_panasonic_m24eg-pn28240k.dts b/target/linux/realtek/dts-5.10/rtl8382_panasonic_m24eg-pn28240k.dts deleted file mode 100644 index 1fa9d2cdc7..0000000000 --- a/target/linux/realtek/dts-5.10/rtl8382_panasonic_m24eg-pn28240k.dts +++ /dev/null @@ -1,190 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include "rtl838x.dtsi" -#include "rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi" - -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - compatible = "panasonic,m24eg-pn28240k", "realtek,rtl8382-soc"; - model = "Panasonic Switch-M24eG PN28240K"; - - aliases { - led-boot = &led_status_eco_green; - led-failsafe = &led_status_eco_amber; - led-running = &led_status_eco_green; - led-upgrade = &led_status_eco_green; - }; - - /* - * sfp0/1 are "combo" port with each TP port (23/24), and they are - * connected to the RTL8218FB. Currently, there is no support for - * the chip and only TP ports work by the RTL8218D support. - */ - sfp0: sfp-p23 { - compatible = "sff,sfp"; - i2c-bus = <&i2c0>; - tx-fault-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; - tx-disable-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; - los-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; - }; - - sfp1: sfp-p24 { - compatible = "sff,sfp"; - i2c-bus = <&i2c1>; - tx-fault-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; - tx-disable-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>; - los-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; - }; -}; - -&leds { - led_status_eco_amber: led-5 { - label = "amber:status_eco"; - gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; - color = <LED_COLOR_ID_AMBER>; - function = LED_FUNCTION_STATUS; - function-enumerator = <1>; - }; - - led_status_eco_green: led-6 { - label = "green:status_eco"; - gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_STATUS; - function-enumerator = <2>; - }; -}; - -&i2c_gpio_0 { - scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -}; - -&i2c_gpio_1 { - scl-gpios = <&gpio0 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio0 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -}; - -&gpio2 { - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&gpio0>; - interrupts = <2 IRQ_TYPE_EDGE_FALLING>; - - /* - * GPIO12 (IO1_4): RTL8218B + RTL8218FB - * - * This GPIO pin should be specified as "reset-gpio" in mdio node, - * but the current configuration of RTL8218B phy in the phy driver - * seems to be incomplete and RTL8218FB phy won't be configured on - * RTL8218D support. So, ethernet ports on these phys will be broken - * after hard-resetting. - * (RTL8218FB phy will be detected as RTL8218D by the phy driver) - * At the moment, configure this GPIO pin as gpio-hog to avoid breaking - * by resetting. - */ - ext_switch_reset { - gpio-hog; - gpios = <12 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "ext-switch-reset"; - }; -}; - -&i2c_switch { - i2c0: i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - }; - - i2c1: i2c@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - }; -}; - -ðernet0 { - mdio-bus { - compatible = "realtek,rtl838x-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - EXTERNAL_PHY(0) - EXTERNAL_PHY(1) - EXTERNAL_PHY(2) - EXTERNAL_PHY(3) - EXTERNAL_PHY(4) - EXTERNAL_PHY(5) - EXTERNAL_PHY(6) - EXTERNAL_PHY(7) - - INTERNAL_PHY(8) - INTERNAL_PHY(9) - INTERNAL_PHY(10) - INTERNAL_PHY(11) - INTERNAL_PHY(12) - INTERNAL_PHY(13) - INTERNAL_PHY(14) - INTERNAL_PHY(15) - - /* RTL8218FB */ - EXTERNAL_PHY(16) - EXTERNAL_PHY(17) - EXTERNAL_PHY(18) - EXTERNAL_PHY(19) - EXTERNAL_PHY(20) - EXTERNAL_PHY(21) - EXTERNAL_PHY(22) - EXTERNAL_PHY(23) - }; -}; - -&switch0 { - ports { - #address-cells = <1>; - #size-cells = <0>; - - SWITCH_PORT(0, 1, qsgmii) - SWITCH_PORT(1, 2, qsgmii) - SWITCH_PORT(2, 3, qsgmii) - SWITCH_PORT(3, 4, qsgmii) - SWITCH_PORT(4, 5, qsgmii) - SWITCH_PORT(5, 6, qsgmii) - SWITCH_PORT(6, 7, qsgmii) - SWITCH_PORT(7, 8, qsgmii) - - SWITCH_PORT(8, 9, internal) - SWITCH_PORT(9, 10, internal) - SWITCH_PORT(10, 11, internal) - SWITCH_PORT(11, 12, internal) - SWITCH_PORT(12, 13, internal) - SWITCH_PORT(13, 14, internal) - SWITCH_PORT(14, 15, internal) - SWITCH_PORT(15, 16, internal) - - SWITCH_PORT(16, 17, qsgmii) - SWITCH_PORT(17, 18, qsgmii) - SWITCH_PORT(18, 19, qsgmii) - SWITCH_PORT(19, 20, qsgmii) - SWITCH_PORT(20, 21, qsgmii) - SWITCH_PORT(21, 22, qsgmii) - SWITCH_PORT(22, 23, qsgmii) - SWITCH_PORT(23, 24, qsgmii) - - port@28 { - ethernet = <ðernet0>; - reg = <28>; - phy-mode = "internal"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; -}; |