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authorTimothy B. Terriberry <tterribe@xiph.org>2013-05-21 12:53:33 -0700
committerTimothy B. Terriberry <tterribe@xiph.org>2013-05-21 12:53:33 -0700
commite095c3eb7f84983e58d61983dbb29cbbf42a902d (patch)
treeeb3ce8e9b217ccde57e5e7f716534e00f5d5e356 /celt/_kiss_fft_guts.h
parentb518b56fe11bf53f88fe30d57ea9d668337983a9 (diff)
downloadopus-e095c3eb7f84983e58d61983dbb29cbbf42a902d.tar.gz
Move ARM asm into its own directories.
Diffstat (limited to 'celt/_kiss_fft_guts.h')
-rw-r--r--celt/_kiss_fft_guts.h171
1 files changed, 3 insertions, 168 deletions
diff --git a/celt/_kiss_fft_guts.h b/celt/_kiss_fft_guts.h
index cbe75579..f0c6976e 100644
--- a/celt/_kiss_fft_guts.h
+++ b/celt/_kiss_fft_guts.h
@@ -95,178 +95,13 @@
}while(0)
#if defined(ARMv4_ASM)
-
-#undef C_MUL
-#define C_MUL(m,a,b) \
- do{ \
- int br__; \
- int bi__; \
- int tt__; \
- __asm__ __volatile__( \
- "#C_MUL\n\t" \
- "ldm %[ap], {r0,r1}\n\t" \
- "ldrsh %[br], [%[bp], #0]\n\t" \
- "ldrsh %[bi], [%[bp], #2]\n\t" \
- "smull %[tt], %[mi], r1, %[br]\n\t" \
- "smlal %[tt], %[mi], r0, %[bi]\n\t" \
- "rsb %[bi], %[bi], #0\n\t" \
- "smull r0, %[mr], %[br], r0\n\t" \
- "mov %[tt], %[tt], lsr #15\n\t" \
- "smlal r0, %[mr], r1, %[bi]\n\t" \
- "orr %[mi], %[tt], %[mi], lsl #17\n\t" \
- "mov r0, r0, lsr #15\n\t" \
- "orr %[mr], r0, %[mr], lsl #17\n\t" \
- : [mr]"=r"((m).r), [mi]"=r"((m).i), \
- [br]"=&r"(br__), [bi]"=r"(bi__), [tt]"=r"(tt__) \
- : [ap]"r"(&(a)), [bp]"r"(&(b)) \
- : "r0", "r1" \
- ); \
- } \
- while(0)
-
-#undef C_MUL4
-#define C_MUL4(m,a,b) \
- do{ \
- int br__; \
- int bi__; \
- int tt__; \
- __asm__ __volatile__( \
- "#C_MUL4\n\t" \
- "ldm %[ap], {r0,r1}\n\t" \
- "ldrsh %[br], [%[bp], #0]\n\t" \
- "ldrsh %[bi], [%[bp], #2]\n\t" \
- "smull %[tt], %[mi], r1, %[br]\n\t" \
- "smlal %[tt], %[mi], r0, %[bi]\n\t" \
- "rsb %[bi], %[bi], #0\n\t" \
- "smull r0, %[mr], %[br], r0\n\t" \
- "mov %[tt], %[tt], lsr #17\n\t" \
- "smlal r0, %[mr], r1, %[bi]\n\t" \
- "orr %[mi], %[tt], %[mi], lsl #15\n\t" \
- "mov r0, r0, lsr #17\n\t" \
- "orr %[mr], r0, %[mr], lsl #15\n\t" \
- : [mr]"=r"((m).r), [mi]"=r"((m).i), \
- [br]"=&r"(br__), [bi]"=r"(bi__), [tt]"=r"(tt__) \
- : [ap]"r"(&(a)), [bp]"r"(&(b)) \
- : "r0", "r1" \
- ); \
- } \
- while(0)
-
-#undef C_MULC
-#define C_MULC(m,a,b) \
- do{ \
- int br__; \
- int bi__; \
- int tt__; \
- __asm__ __volatile__( \
- "#C_MULC\n\t" \
- "ldm %[ap], {r0,r1}\n\t" \
- "ldrsh %[br], [%[bp], #0]\n\t" \
- "ldrsh %[bi], [%[bp], #2]\n\t" \
- "smull %[tt], %[mr], r0, %[br]\n\t" \
- "smlal %[tt], %[mr], r1, %[bi]\n\t" \
- "rsb %[bi], %[bi], #0\n\t" \
- "smull r1, %[mi], %[br], r1\n\t" \
- "mov %[tt], %[tt], lsr #15\n\t" \
- "smlal r1, %[mi], r0, %[bi]\n\t" \
- "orr %[mr], %[tt], %[mr], lsl #17\n\t" \
- "mov r1, r1, lsr #15\n\t" \
- "orr %[mi], r1, %[mi], lsl #17\n\t" \
- : [mr]"=r"((m).r), [mi]"=r"((m).i), \
- [br]"=&r"(br__), [bi]"=r"(bi__), [tt]"=r"(tt__) \
- : [ap]"r"(&(a)), [bp]"r"(&(b)) \
- : "r0", "r1" \
- ); \
- } \
- while(0)
-
-#endif /* ARMv4_ASM */
+#include "arm/kiss_fft_armv4.h"
+#endif
#if defined(ARMv5E_ASM)
-
-#if defined(__thumb__)||defined(__thumb2__)
-#define LDRD_CONS "Q"
-#else
-#define LDRD_CONS "Uq"
+#include "arm/kiss_fft_armv5e.h"
#endif
-#undef C_MUL
-#define C_MUL(m,a,b) \
- do{ \
- int mr1__; \
- int mr2__; \
- int mi__; \
- long long aval__; \
- int bval__; \
- __asm__( \
- "#C_MUL\n\t" \
- "ldrd %[aval], %H[aval], %[ap]\n\t" \
- "ldr %[bval], %[bp]\n\t" \
- "smulwb %[mi], %H[aval], %[bval]\n\t" \
- "smulwb %[mr1], %[aval], %[bval]\n\t" \
- "smulwt %[mr2], %H[aval], %[bval]\n\t" \
- "smlawt %[mi], %[aval], %[bval], %[mi]\n\t" \
- : [mr1]"=r"(mr1__), [mr2]"=r"(mr2__), [mi]"=r"(mi__), \
- [aval]"=&r"(aval__), [bval]"=r"(bval__) \
- : [ap]LDRD_CONS(a), [bp]"m"(b) \
- ); \
- (m).r = SHL32(SUB32(mr1__, mr2__), 1); \
- (m).i = SHL32(mi__, 1); \
- } \
- while(0)
-
-#undef C_MUL4
-#define C_MUL4(m,a,b) \
- do{ \
- int mr1__; \
- int mr2__; \
- int mi__; \
- long long aval__; \
- int bval__; \
- __asm__( \
- "#C_MUL4\n\t" \
- "ldrd %[aval], %H[aval], %[ap]\n\t" \
- "ldr %[bval], %[bp]\n\t" \
- "smulwb %[mi], %H[aval], %[bval]\n\t" \
- "smulwb %[mr1], %[aval], %[bval]\n\t" \
- "smulwt %[mr2], %H[aval], %[bval]\n\t" \
- "smlawt %[mi], %[aval], %[bval], %[mi]\n\t" \
- : [mr1]"=r"(mr1__), [mr2]"=r"(mr2__), [mi]"=r"(mi__), \
- [aval]"=&r"(aval__), [bval]"=r"(bval__) \
- : [ap]LDRD_CONS(a), [bp]"m"(b) \
- ); \
- (m).r = SHR32(SUB32(mr1__, mr2__), 1); \
- (m).i = SHR32(mi__, 1); \
- } \
- while(0)
-
-#undef C_MULC
-#define C_MULC(m,a,b) \
- do{ \
- int mr__; \
- int mi1__; \
- int mi2__; \
- long long aval__; \
- int bval__; \
- __asm__( \
- "#C_MULC\n\t" \
- "ldrd %[aval], %H[aval], %[ap]\n\t" \
- "ldr %[bval], %[bp]\n\t" \
- "smulwb %[mr], %[aval], %[bval]\n\t" \
- "smulwb %[mi1], %H[aval], %[bval]\n\t" \
- "smulwt %[mi2], %[aval], %[bval]\n\t" \
- "smlawt %[mr], %H[aval], %[bval], %[mr]\n\t" \
- : [mr]"=r"(mr__), [mi1]"=r"(mi1__), [mi2]"=r"(mi2__), \
- [aval]"=&r"(aval__), [bval]"=r"(bval__) \
- : [ap]LDRD_CONS(a), [bp]"m"(b) \
- ); \
- (m).r = SHL32(mr__, 1); \
- (m).i = SHL32(SUB32(mi1__, mi2__), 1); \
- } \
- while(0)
-
-#endif /* ARMv5E_ASM */
-
#else /* not FIXED_POINT*/
# define S_MUL(a,b) ( (a)*(b) )