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authorRaghuveer Devulapalli <raghuveer.devulapalli@intel.com>2023-02-06 11:02:26 -0800
committerRaghuveer Devulapalli <raghuveer.devulapalli@intel.com>2023-02-06 11:02:26 -0800
commit42a771e776aaa79a6b135fe98d44ab0eaa04122e (patch)
tree52ddac1ada353dedf650862ea7bfe2c3d529858d /numpy
parent68ff715959408773d7a991167c13974796c4c7dc (diff)
downloadnumpy-42a771e776aaa79a6b135fe98d44ab0eaa04122e.tar.gz
Remove unnecessary checks
Diffstat (limited to 'numpy')
-rw-r--r--numpy/core/tests/test_cpu_features.py4
-rw-r--r--numpy/distutils/checks/cpu_avx512_spr.c17
-rw-r--r--numpy/distutils/checks/cpu_avx512fp16.c23
3 files changed, 8 insertions, 36 deletions
diff --git a/numpy/core/tests/test_cpu_features.py b/numpy/core/tests/test_cpu_features.py
index ba227a3c0..8c1c25ed4 100644
--- a/numpy/core/tests/test_cpu_features.py
+++ b/numpy/core/tests/test_cpu_features.py
@@ -129,7 +129,9 @@ class Test_X86_Features(AbstractTest):
AVX512_ICL = ["AVX512F", "AVX512CD", "AVX512BW", "AVX512DQ", "AVX512VL", "AVX512IFMA",
"AVX512VBMI", "AVX512VNNI", "AVX512VBMI2", "AVX512BITALG", "AVX512VPOPCNTDQ"],
AVX512_SPR = ["AVX512F", "AVX512CD", "AVX512BW", "AVX512DQ",
- "AVX512VL", "AVX512FP16"],
+ "AVX512VL", "AVX512IFMA", "AVX512VBMI", "AVX512VNNI",
+ "AVX512VBMI2", "AVX512BITALG", "AVX512VPOPCNTDQ",
+ "AVX512FP16"],
)
features_map = dict(
SSE3="PNI", SSE41="SSE4_1", SSE42="SSE4_2", FMA3="FMA",
diff --git a/numpy/distutils/checks/cpu_avx512_spr.c b/numpy/distutils/checks/cpu_avx512_spr.c
index 763392fba..3c9575a57 100644
--- a/numpy/distutils/checks/cpu_avx512_spr.c
+++ b/numpy/distutils/checks/cpu_avx512_spr.c
@@ -6,8 +6,8 @@
* is enabled via `--cpu-baseline` or through env var `CFLAGS` otherwise
* the test will be broken and leads to enable all possible features.
*/
- #if !defined(__AVX512VL__) || !defined(__AVX512BW__) || !defined(__AVX512DQ__) || !defined(__AVX512FP16__)
- #error "HOST/ARCH doesn't support Sapphire Rapids AVX512 features"
+ #if !defined(__AVX512FP16__)
+ #error "HOST/ARCH doesn't support Sapphire Rapids AVX512FP16 features"
#endif
#endif
@@ -15,15 +15,8 @@
int main(int argc, char **argv)
{
- __m512i aa = _mm512_abs_epi32(_mm512_loadu_si512((const __m512i*)argv[argc-1]));
- /* VL */
- __m256i a = _mm256_abs_epi64(_mm512_extracti64x4_epi64(aa, 1));
- /* DQ */
- __m512i b = _mm512_broadcast_i32x8(a);
- /* BW */
- b = _mm512_abs_epi16(b);
- /* FP16 */
- __m256h temp = _mm512_cvtepi32_ph(b);
- _mm256_storeu_epi32((void*)(argv[argc-1]), _mm256_castph_si256(temp));
+ __m512h a = _mm512_loadu_ph((void*)argv[argc-1]);
+ __m512h temp = _mm512_fmadd_ph(a, a, a);
+ _mm512_storeu_ph((void*)(argv[argc-1]), temp);
return 0;
}
diff --git a/numpy/distutils/checks/cpu_avx512fp16.c b/numpy/distutils/checks/cpu_avx512fp16.c
deleted file mode 100644
index fa5248ff7..000000000
--- a/numpy/distutils/checks/cpu_avx512fp16.c
+++ /dev/null
@@ -1,23 +0,0 @@
-#if defined(DETECT_FEATURES) && defined(__INTEL_COMPILER)
- /*
- * Unlike GCC and CLANG, Intel Compiler exposes all supported intrinsics,
- * whether or not the build options for those features are specified.
- * Therefore, we must test #definitions of CPU features when option native/host
- * is enabled via `--cpu-baseline` or through env var `CFLAGS` otherwise
- * the test will be broken and leads to enable all possible features.
- */
- #ifndef __AVX512FP16__
- #error "HOST/ARCH doesn't support AVX512FP16"
- #endif
-#endif
-
-#include <immintrin.h>
-
-int main(int argc, char **argv)
-{
- __m256h a = _mm256_set1_ph(2.0);
- __m512 b = _mm512_cvtxph_ps(a);
- __m512i c = _mm512_cvt_roundps_epi32(b, _MM_FROUND_TO_NEAREST_INT|_MM_FROUND_NO_EXC);
- _mm512_storeu_epi32((void*)argv[argc-1], c);
- return 0;
-}