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authorThomas Symalla <5754458+tsymalla@users.noreply.github.com>2023-01-31 06:07:22 +0100
committerGitHub <noreply@github.com>2023-01-31 06:07:22 +0100
commitc8cf1576cd800d828bb98ea95d6619d1552ef815 (patch)
tree4ef17aca4ec29afb7e6eae14c5e50fe94e41fd70 /tests
parentd4403f0ee0581f8353c3cf0df0db0bf6a40a7c2b (diff)
downloadpygments-git-c8cf1576cd800d828bb98ea95d6619d1552ef815.tar.gz
Extend the AMDGPU lexer. (#2327)
Add support for scratch_ instructions, the attr*.* argument as well as the off modifier. Without support for attr*.*, multiple v_interp instructions are previously rendered incorrectly.
Diffstat (limited to 'tests')
-rw-r--r--tests/examplefiles/amdgpu/amdgpu.isa5
-rw-r--r--tests/examplefiles/amdgpu/amdgpu.isa.output36
2 files changed, 40 insertions, 1 deletions
diff --git a/tests/examplefiles/amdgpu/amdgpu.isa b/tests/examplefiles/amdgpu/amdgpu.isa
index 672fdcc1..9d28e47c 100644
--- a/tests/examplefiles/amdgpu/amdgpu.isa
+++ b/tests/examplefiles/amdgpu/amdgpu.isa
@@ -1,5 +1,8 @@
s_load_dwordx2 s[4:5], s[0:1], 0x10
s_load_dwordx4 s[0:3], s[0:1], 0x00
+scratch_load_dwordx3 v[2:5], v0, off
+v_interp_p1_f32_e32 v2, v0, attr0.x
+v_interp_p1_f32_e32 v3, v0, attr0.y
v_lshlrev_b32 v0, 2, v0
s_waitcnt lgkmcnt(0)
v_add_u32 v1, vcc, s2, v0
@@ -8,4 +11,4 @@ v_addc_u32 v2, vcc, v2, 0, vcc
v_add_u32 v3, vcc, s0, v0
v_mov_b32 v4, s1
v_addc_u32 v4, vcc, v4, 0, vcc
-buffer_load_dword v4, v2, s[8:11], 0 offen \ No newline at end of file
+buffer_load_dword v4, v2, s[8:11], 0 offen
diff --git a/tests/examplefiles/amdgpu/amdgpu.isa.output b/tests/examplefiles/amdgpu/amdgpu.isa.output
index 6b9e0528..b752ba5c 100644
--- a/tests/examplefiles/amdgpu/amdgpu.isa.output
+++ b/tests/examplefiles/amdgpu/amdgpu.isa.output
@@ -32,6 +32,42 @@
'0x00' Literal.Number.Integer
'\n' Text.Whitespace
+'scratch_load_dwordx3' Keyword.Reserved
+' ' Text.Whitespace
+'v' Name.Variable
+'[' Text
+'2:5' Name.Attribute
+']' Text
+',' Text
+' ' Text.Whitespace
+'v0' Name.Variable
+',' Text
+' ' Text.Whitespace
+'off' Name.Attribute
+'\n' Text.Whitespace
+
+'v_interp_p1_f32_e32' Keyword
+' ' Text.Whitespace
+'v2' Name.Variable
+',' Text
+' ' Text.Whitespace
+'v0' Name.Variable
+',' Text
+' ' Text.Whitespace
+'attr0.x' Name.Attribute
+'\n' Text.Whitespace
+
+'v_interp_p1_f32_e32' Keyword
+' ' Text.Whitespace
+'v3' Name.Variable
+',' Text
+' ' Text.Whitespace
+'v0' Name.Variable
+',' Text
+' ' Text.Whitespace
+'attr0.y' Name.Attribute
+'\n' Text.Whitespace
+
'v_lshlrev_b32' Keyword
' ' Text.Whitespace
'v0' Name.Variable