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| author | Erik Verbruggen <erik.verbruggen@me.com> | 2013-09-01 15:45:53 +0200 |
|---|---|---|
| committer | The Qt Project <gerrit-noreply@qt-project.org> | 2013-09-13 11:41:23 +0200 |
| commit | 9c82c105a1886473ca144b802ce9f5bec01e35e8 (patch) | |
| tree | 2caeb5945e2b60f49ba046ec50a45c0bec4f2f7d /src/qml/compiler/qv4isel_masm.cpp | |
| parent | 0ef673efe8bf381e1aa0202752deac27e86ada53 (diff) | |
| download | qtdeclarative-9c82c105a1886473ca144b802ce9f5bec01e35e8.tar.gz | |
V4: Fix SSA decomposition when no regalloc is used.
Add scheduling for moves generated by removing phi nodes by re-using the
MoveMapping class from the register allocator. This change applies to
both the JIT when no register allocator is used, and the interpreter.
Change-Id: I38eac5b13759c7790132d1ef07fa17fcb53187e3
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
Diffstat (limited to 'src/qml/compiler/qv4isel_masm.cpp')
| -rw-r--r-- | src/qml/compiler/qv4isel_masm.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/qml/compiler/qv4isel_masm.cpp b/src/qml/compiler/qv4isel_masm.cpp index 7905ffe977..d0477b2387 100644 --- a/src/qml/compiler/qv4isel_masm.cpp +++ b/src/qml/compiler/qv4isel_masm.cpp @@ -601,7 +601,6 @@ void InstructionSelection::run(int functionIndex) qSwap(_function, function); qSwap(_reentryBlocks, reentryBlocks); - V4IR::Optimizer opt(_function); opt.run(); @@ -1165,8 +1164,6 @@ void InstructionSelection::swapValues(V4IR::Temp *sourceTemp, V4IR::Temp *target } } - Q_ASSERT(sourceTemp->type == targetTemp->type); - V4IR::Temp *stackTemp = sourceTemp->kind == V4IR::Temp::StackSlot ? sourceTemp : targetTemp; V4IR::Temp *registerTemp = sourceTemp->kind == V4IR::Temp::PhysicalRegister ? sourceTemp : targetTemp; |