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authorKonstantin Tokarev <annulen@yandex.ru>2016-08-25 19:20:41 +0300
committerKonstantin Tokarev <annulen@yandex.ru>2017-02-02 12:30:55 +0000
commit6882a04fb36642862b11efe514251d32070c3d65 (patch)
treeb7959826000b061fd5ccc7512035c7478742f7b0 /Source/JavaScriptCore/dfg/DFGRegisterBank.h
parentab6df191029eeeb0b0f16f127d553265659f739e (diff)
downloadqtwebkit-6882a04fb36642862b11efe514251d32070c3d65.tar.gz
Imported QtWebKit TP3 (git b57bc6801f1876c3220d5a4bfea33d620d477443)
Change-Id: I3b1d8a2808782c9f34d50240000e20cb38d3680f Reviewed-by: Konstantin Tokarev <annulen@yandex.ru>
Diffstat (limited to 'Source/JavaScriptCore/dfg/DFGRegisterBank.h')
-rw-r--r--Source/JavaScriptCore/dfg/DFGRegisterBank.h33
1 files changed, 18 insertions, 15 deletions
diff --git a/Source/JavaScriptCore/dfg/DFGRegisterBank.h b/Source/JavaScriptCore/dfg/DFGRegisterBank.h
index 4d1be406a..32c1e91ee 100644
--- a/Source/JavaScriptCore/dfg/DFGRegisterBank.h
+++ b/Source/JavaScriptCore/dfg/DFGRegisterBank.h
@@ -29,6 +29,8 @@
#if ENABLE(DFG_JIT)
#include "DFGCommon.h"
+#include "FPRInfo.h"
+#include "GPRInfo.h"
namespace JSC { namespace DFG {
@@ -83,10 +85,10 @@ public:
// returns -1 (InvalidGPRReg or InvalidFPRReg).
RegID tryAllocate()
{
- VirtualRegister ignored;
+ VirtualRegister ignored = VirtualRegister();
for (uint32_t i = 0; i < NUM_REGS; ++i) {
- if (!m_data[i].lockCount && m_data[i].name == InvalidVirtualRegister)
+ if (!m_data[i].lockCount && !m_data[i].name.isValid())
return allocateInternal(i, ignored);
}
@@ -145,7 +147,7 @@ public:
++m_data[index].lockCount;
VirtualRegister name = nameAtIndex(index);
- if (name != InvalidVirtualRegister)
+ if (name.isValid())
releaseAtIndex(index);
return name;
@@ -163,8 +165,8 @@ public:
ASSERT(index < NUM_REGS);
ASSERT(m_data[index].lockCount);
// 'index' should not currently be named, the new name must be valid.
- ASSERT(m_data[index].name == InvalidVirtualRegister);
- ASSERT(name != InvalidVirtualRegister);
+ ASSERT(!m_data[index].name.isValid());
+ ASSERT(name.isValid());
// 'index' should not currently have a spillOrder.
ASSERT(m_data[index].spillOrder == SpillHintInvalid);
@@ -199,7 +201,7 @@ public:
}
// Get the name (VirtualRegister) associated with the
- // given register (or InvalidVirtualRegister for none).
+ // given register (or default VirtualRegister() for none).
VirtualRegister name(RegID reg) const
{
return nameAtIndex(BankInfo::toIndex(reg));
@@ -207,22 +209,20 @@ public:
bool isInUse(RegID reg) const
{
- return isLocked(reg) || name(reg) != InvalidVirtualRegister;
+ return isLocked(reg) || name(reg).isValid();
}
-#ifndef NDEBUG
void dump()
{
// For each register, print the VirtualRegister 'name'.
for (uint32_t i =0; i < NUM_REGS; ++i) {
- if (m_data[i].name != InvalidVirtualRegister)
- dataLogF("[%02d]", m_data[i].name);
+ if (m_data[i].name.isValid())
+ dataLogF("[%02d]", m_data[i].name.offset());
else
dataLogF("[--]");
}
dataLogF("\n");
}
-#endif
class iterator {
friend class RegisterBank<BankInfo>;
@@ -310,11 +310,11 @@ private:
// 'index' must be a valid register.
ASSERT(index < NUM_REGS);
// 'index' should currently be named.
- ASSERT(m_data[index].name != InvalidVirtualRegister);
+ ASSERT(m_data[index].name.isValid());
// 'index' should currently have a valid spill order.
ASSERT(m_data[index].spillOrder != SpillHintInvalid);
- m_data[index].name = InvalidVirtualRegister;
+ m_data[index].name = VirtualRegister();
m_data[index].spillOrder = SpillHintInvalid;
}
@@ -325,7 +325,7 @@ private:
ASSERT(i < NUM_REGS && !m_data[i].lockCount);
// Return the VirtualRegister of the named value currently stored in
- // the register being returned - or InvalidVirtualRegister if none.
+ // the register being returned - or default VirtualRegister() if none.
spillMe = m_data[i].name;
// Clear any name/spillOrder currently associated with the register,
@@ -343,7 +343,7 @@ private:
// count, name and spillOrder hint.
struct MapEntry {
MapEntry()
- : name(InvalidVirtualRegister)
+ : name(VirtualRegister())
, spillOrder(SpillHintInvalid)
, lockCount(0)
{
@@ -358,6 +358,9 @@ private:
MapEntry m_data[NUM_REGS];
};
+typedef RegisterBank<GPRInfo>::iterator gpr_iterator;
+typedef RegisterBank<FPRInfo>::iterator fpr_iterator;
+
} } // namespace JSC::DFG
#endif