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author | Oswald Buddenhagen <oswald.buddenhagen@qt.io> | 2017-05-30 12:48:17 +0200 |
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committer | Oswald Buddenhagen <oswald.buddenhagen@qt.io> | 2017-05-30 12:48:17 +0200 |
commit | 881da28418d380042aa95a97f0cbd42560a64f7c (patch) | |
tree | a794dff3274695e99c651902dde93d934ea7a5af /Source/JavaScriptCore/offlineasm/instructions.rb | |
parent | 7e104c57a70fdf551bb3d22a5d637cdcbc69dbea (diff) | |
parent | 0fcedcd17cc00d3dd44c718b3cb36c1033319671 (diff) | |
download | qtwebkit-881da28418d380042aa95a97f0cbd42560a64f7c.tar.gz |
Merge 'wip/next' into dev
Change-Id: Iff9ee5e23bb326c4371ec8ed81d56f2f05d680e9
Diffstat (limited to 'Source/JavaScriptCore/offlineasm/instructions.rb')
-rw-r--r-- | Source/JavaScriptCore/offlineasm/instructions.rb | 46 |
1 files changed, 33 insertions, 13 deletions
diff --git a/Source/JavaScriptCore/offlineasm/instructions.rb b/Source/JavaScriptCore/offlineasm/instructions.rb index a54827ef8..244928746 100644 --- a/Source/JavaScriptCore/offlineasm/instructions.rb +++ b/Source/JavaScriptCore/offlineasm/instructions.rb @@ -22,6 +22,7 @@ # THE POSSIBILITY OF SUCH DAMAGE. require "config" +require "set" # Interesting invariant, which we take advantage of: branching instructions # always begin with "b", and no non-branching instructions begin with "b". @@ -29,6 +30,7 @@ require "config" MACRO_INSTRUCTIONS = [ + "emit", "addi", "andi", "lshifti", @@ -206,8 +208,6 @@ MACRO_INSTRUCTIONS = "tqs", "tqz", "tqnz", - "peekq", - "pokeq", "bqeq", "bqneq", "bqa", @@ -249,6 +249,7 @@ MACRO_INSTRUCTIONS = "bnz", "leai", "leap", + "memfence" ] X86_INSTRUCTIONS = @@ -259,10 +260,23 @@ X86_INSTRUCTIONS = ARM_INSTRUCTIONS = [ - "smulli", - "addis", - "subis", - "oris" + "clrbp", + "mvlbl" + ] + +ARM64_INSTRUCTIONS = + [ + "pcrtoaddr", # Address from PC relative offset - adr instruction + "nopFixCortexA53Err835769" # nop on Cortex-A53 (nothing otherwise) + ] + +RISC_INSTRUCTIONS = + [ + "smulli", # Multiply two 32-bit words and produce a 64-bit word + "addis", # Add integers and set a flag. + "subis", # Same, but for subtraction. + "oris", # Same, but for bitwise or. + "addps" # addis but for pointers. ] MIPS_INSTRUCTIONS = @@ -270,6 +284,7 @@ MIPS_INSTRUCTIONS = "la", "movz", "movn", + "setcallreg", "slt", "sltu", "pichdr" @@ -277,6 +292,9 @@ MIPS_INSTRUCTIONS = SH4_INSTRUCTIONS = [ + "flushcp", + "alignformova", + "mova", "shllx", "shlrx", "shld", @@ -285,15 +303,17 @@ SH4_INSTRUCTIONS = "loaddReversedAndIncrementAddress", "storedReversedAndDecrementAddress", "ldspr", - "stspr" + "stspr", + "setargs" ] CXX_INSTRUCTIONS = [ - "cloopCrash", # no operands - "cloopCallJSFunction", # operands: callee - "cloopCallNative", # operands: callee - "cloopCallSlowPath", # operands: callTarget, currentFrame, currentPC + "cloopCrash", # no operands + "cloopCallJSFunction", # operands: callee + "cloopCallNative", # operands: callee + "cloopCallSlowPath", # operands: callTarget, currentFrame, currentPC + "cloopCallSlowPathVoid", # operands: callTarget, currentFrame, currentPC # For debugging only: # Takes no operands but simply emits whatever follows in // comments as @@ -304,9 +324,9 @@ CXX_INSTRUCTIONS = "cloopDo", # no operands ] -INSTRUCTIONS = MACRO_INSTRUCTIONS + X86_INSTRUCTIONS + ARM_INSTRUCTIONS + MIPS_INSTRUCTIONS + SH4_INSTRUCTIONS + CXX_INSTRUCTIONS +INSTRUCTIONS = MACRO_INSTRUCTIONS + X86_INSTRUCTIONS + ARM_INSTRUCTIONS + ARM64_INSTRUCTIONS + RISC_INSTRUCTIONS + MIPS_INSTRUCTIONS + SH4_INSTRUCTIONS + CXX_INSTRUCTIONS -INSTRUCTION_PATTERN = Regexp.new('\\A((' + INSTRUCTIONS.join(')|(') + '))\\Z') +INSTRUCTION_SET = INSTRUCTIONS.to_set def isBranch(instruction) instruction =~ /^b/ |