diff options
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/asm.rs | 7 | ||||
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/asm.rs | 10 | ||||
| -rw-r--r-- | compiler/rustc_span/src/symbol.rs | 2 | ||||
| -rw-r--r-- | compiler/rustc_target/src/asm/m68k.rs | 81 | ||||
| -rw-r--r-- | compiler/rustc_target/src/asm/mod.rs | 24 | ||||
| -rw-r--r-- | src/doc/unstable-book/src/language-features/asm-experimental-arch.md | 14 | ||||
| -rw-r--r-- | tests/assembly/asm/m68k-types.rs | 83 |
7 files changed, 220 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_gcc/src/asm.rs b/compiler/rustc_codegen_gcc/src/asm.rs index 41e9d61a10e..65de02b3567 100644 --- a/compiler/rustc_codegen_gcc/src/asm.rs +++ b/compiler/rustc_codegen_gcc/src/asm.rs @@ -593,6 +593,9 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister { InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r", InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w", InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r", + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r", + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a", + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d", InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r" InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f", InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r", @@ -664,6 +667,9 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl InlineAsmRegClass::Avr(_) => unimplemented!(), InlineAsmRegClass::Bpf(_) => unimplemented!(), InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(), + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(), + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => cx.type_i32(), + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => cx.type_i32(), InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(), InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(), InlineAsmRegClass::Msp430(_) => unimplemented!(), @@ -849,6 +855,7 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option InlineAsmRegClass::Avr(_) => None, InlineAsmRegClass::S390x(_) => None, InlineAsmRegClass::Msp430(_) => None, + InlineAsmRegClass::M68k(_) => None, InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("LLVM backend does not support SPIR-V") } diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index e7668341eb6..1a3865360a3 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -244,6 +244,9 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> { InlineAsmArch::Msp430 => { constraints.push("~{sr}".to_string()); } + InlineAsmArch::M68k => { + constraints.push("~{ccr}".to_string()); + } } } if !options.contains(InlineAsmOptions::NOMEM) { @@ -671,6 +674,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) -> InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r", InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f", InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r", + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r", + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a", + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d", InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("LLVM backend does not support SPIR-V") } @@ -768,6 +774,7 @@ fn modifier_to_llvm( InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("LLVM backend does not support SPIR-V") } + InlineAsmRegClass::M68k(_) => None, InlineAsmRegClass::Err => unreachable!(), } } @@ -839,6 +846,9 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &' InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(), InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(), InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => cx.type_i16(), + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(), + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => cx.type_i32(), + InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => cx.type_i32(), InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("LLVM backend does not support SPIR-V") } diff --git a/compiler/rustc_span/src/symbol.rs b/compiler/rustc_span/src/symbol.rs index 7affad9aa01..03b522bc63a 100644 --- a/compiler/rustc_span/src/symbol.rs +++ b/compiler/rustc_span/src/symbol.rs @@ -1173,7 +1173,9 @@ symbols! { reg32, reg64, reg_abcd, + reg_addr, reg_byte, + reg_data, reg_iw, reg_nonzero, reg_pair, diff --git a/compiler/rustc_target/src/asm/m68k.rs b/compiler/rustc_target/src/asm/m68k.rs new file mode 100644 index 00000000000..8c857550cf2 --- /dev/null +++ b/compiler/rustc_target/src/asm/m68k.rs @@ -0,0 +1,81 @@ +use super::{InlineAsmArch, InlineAsmType}; +use rustc_macros::HashStable_Generic; +use rustc_span::Symbol; +use std::fmt; + +def_reg_class! { + M68k M68kInlineAsmRegClass { + reg, + reg_addr, + reg_data, + } +} + +impl M68kInlineAsmRegClass { + pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] { + &[] + } + + pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> { + None + } + + pub fn suggest_modifier( + self, + _arch: InlineAsmArch, + _ty: InlineAsmType, + ) -> Option<(char, &'static str)> { + None + } + + pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> { + None + } + + pub fn supported_types( + self, + _arch: InlineAsmArch, + ) -> &'static [(InlineAsmType, Option<Symbol>)] { + match self { + Self::reg => types! { _: I16, I32; }, + Self::reg_data => types! { _: I8, I16, I32; }, + Self::reg_addr => types! { _: I16, I32; }, + } + } +} + +def_regs! { + M68k M68kInlineAsmReg M68kInlineAsmRegClass { + d0: reg, reg_data = ["d0"], + d1: reg, reg_data = ["d1"], + d2: reg, reg_data = ["d2"], + d3: reg, reg_data = ["d3"], + d4: reg, reg_data = ["d4"], + d5: reg, reg_data = ["d5"], + d6: reg, reg_data = ["d6"], + d7: reg, reg_data = ["d7"], + a0: reg, reg_addr = ["a0"], + a1: reg, reg_addr = ["a1"], + a2: reg, reg_addr = ["a2"], + a3: reg, reg_addr = ["a3"], + #error = ["a4"] => + "a4 is used internally by LLVM and cannot be used as an operand for inline asm", + #error = ["a5", "bp"] => + "a5 is used internally by LLVM and cannot be used as an operand for inline asm", + #error = ["a6", "fp"] => + "a6 is used internally by LLVM and cannot be used as an operand for inline asm", + #error = ["a7", "sp", "usp", "ssp", "isp"] => + "the stack pointer cannot be used as an operand for inline asm", + } +} + +impl M68kInlineAsmReg { + pub fn emit( + self, + out: &mut dyn fmt::Write, + _arch: InlineAsmArch, + _modifier: Option<char>, + ) -> fmt::Result { + out.write_str(self.name()) + } +} diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs index 0dbfd426781..3f9c850b352 100644 --- a/compiler/rustc_target/src/asm/mod.rs +++ b/compiler/rustc_target/src/asm/mod.rs @@ -168,6 +168,7 @@ mod arm; mod avr; mod bpf; mod hexagon; +mod m68k; mod mips; mod msp430; mod nvptx; @@ -183,6 +184,7 @@ pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass}; pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass}; pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass}; pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass}; +pub use m68k::{M68kInlineAsmReg, M68kInlineAsmRegClass}; pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass}; pub use msp430::{Msp430InlineAsmReg, Msp430InlineAsmRegClass}; pub use nvptx::{NvptxInlineAsmReg, NvptxInlineAsmRegClass}; @@ -214,6 +216,7 @@ pub enum InlineAsmArch { Bpf, Avr, Msp430, + M68k, } impl FromStr for InlineAsmArch { @@ -240,6 +243,7 @@ impl FromStr for InlineAsmArch { "bpf" => Ok(Self::Bpf), "avr" => Ok(Self::Avr), "msp430" => Ok(Self::Msp430), + "m68k" => Ok(Self::M68k), _ => Err(()), } } @@ -262,6 +266,7 @@ pub enum InlineAsmReg { Bpf(BpfInlineAsmReg), Avr(AvrInlineAsmReg), Msp430(Msp430InlineAsmReg), + M68k(M68kInlineAsmReg), // Placeholder for invalid register constraints for the current target Err, } @@ -280,6 +285,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.name(), Self::Avr(r) => r.name(), Self::Msp430(r) => r.name(), + Self::M68k(r) => r.name(), Self::Err => "<reg>", } } @@ -297,6 +303,7 @@ impl InlineAsmReg { Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()), Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()), Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()), + Self::M68k(r) => InlineAsmRegClass::M68k(r.reg_class()), Self::Err => InlineAsmRegClass::Err, } } @@ -328,6 +335,7 @@ impl InlineAsmReg { InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmReg::parse(name)?), InlineAsmArch::Avr => Self::Avr(AvrInlineAsmReg::parse(name)?), InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmReg::parse(name)?), + InlineAsmArch::M68k => Self::M68k(M68kInlineAsmReg::parse(name)?), }) } @@ -351,6 +359,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), Self::Err => unreachable!(), } } @@ -375,6 +384,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.emit(out, arch, modifier), Self::Avr(r) => r.emit(out, arch, modifier), Self::Msp430(r) => r.emit(out, arch, modifier), + Self::M68k(r) => r.emit(out, arch, modifier), Self::Err => unreachable!("Use of InlineAsmReg::Err"), } } @@ -392,6 +402,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))), Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))), Self::Msp430(_) => cb(self), + Self::M68k(_) => cb(self), Self::Err => unreachable!("Use of InlineAsmReg::Err"), } } @@ -414,6 +425,7 @@ pub enum InlineAsmRegClass { Bpf(BpfInlineAsmRegClass), Avr(AvrInlineAsmRegClass), Msp430(Msp430InlineAsmRegClass), + M68k(M68kInlineAsmRegClass), // Placeholder for invalid register constraints for the current target Err, } @@ -435,6 +447,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.name(), Self::Avr(r) => r.name(), Self::Msp430(r) => r.name(), + Self::M68k(r) => r.name(), Self::Err => rustc_span::symbol::sym::reg, } } @@ -458,6 +471,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf), Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr), Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430), + Self::M68k(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::M68k), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -488,6 +502,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.suggest_modifier(arch, ty), Self::Avr(r) => r.suggest_modifier(arch, ty), Self::Msp430(r) => r.suggest_modifier(arch, ty), + Self::M68k(r) => r.suggest_modifier(arch, ty), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -514,6 +529,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.default_modifier(arch), Self::Avr(r) => r.default_modifier(arch), Self::Msp430(r) => r.default_modifier(arch), + Self::M68k(r) => r.default_modifier(arch), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -539,6 +555,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.supported_types(arch), Self::Avr(r) => r.supported_types(arch), Self::Msp430(r) => r.supported_types(arch), + Self::M68k(r) => r.supported_types(arch), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -569,6 +586,7 @@ impl InlineAsmRegClass { InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(name)?), InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?), InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?), + InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?), }) } @@ -590,6 +608,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.valid_modifiers(arch), Self::Avr(r) => r.valid_modifiers(arch), Self::Msp430(r) => r.valid_modifiers(arch), + Self::M68k(r) => r.valid_modifiers(arch), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -776,6 +795,11 @@ pub fn allocatable_registers( msp430::fill_reg_map(arch, reloc_model, target_features, target, &mut map); map } + InlineAsmArch::M68k => { + let mut map = m68k::regclass_map(); + m68k::fill_reg_map(arch, reloc_model, target_features, target, &mut map); + map + } } } diff --git a/src/doc/unstable-book/src/language-features/asm-experimental-arch.md b/src/doc/unstable-book/src/language-features/asm-experimental-arch.md index 0a48eb4f81a..1f52ab75010 100644 --- a/src/doc/unstable-book/src/language-features/asm-experimental-arch.md +++ b/src/doc/unstable-book/src/language-features/asm-experimental-arch.md @@ -16,6 +16,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect - SPIR-V - AVR - MSP430 +- M68k ## Register classes @@ -41,6 +42,9 @@ This feature tracks `asm!` and `global_asm!` support for the following architect | AVR | `reg_iw` | `r25r24`, `X`, `Z` | `w` | | AVR | `reg_ptr` | `X`, `Z` | `e` | | MSP430 | `reg` | `r[0-15]` | `r` | +| M68k | `reg` | `d[0-7]`, `a[0-7]` | `r` | +| M68k | `reg_data` | `d[0-7]` | `d` | +| M68k | `reg_addr` | `a[0-3]` | `a` | > **Notes**: > - NVPTX doesn't have a fixed register set, so named registers are not supported. @@ -70,6 +74,8 @@ This feature tracks `asm!` and `global_asm!` support for the following architect | AVR | `reg`, `reg_upper` | None | `i8` | | AVR | `reg_pair`, `reg_iw`, `reg_ptr` | None | `i16` | | MSP430 | `reg` | None | `i8`, `i16` | +| M68k | `reg`, `reg_addr` | None | `i16`, `i32` | +| M68k | `reg_data` | None | `i8`, `i16`, `i32` | ## Register aliases @@ -88,6 +94,9 @@ This feature tracks `asm!` and `global_asm!` support for the following architect | MSP430 | `r2` | `sr` | | MSP430 | `r3` | `cg` | | MSP430 | `r4` | `fp` | +| M68k | `a5` | `bp` | +| M68k | `a6` | `fp` | +| M68k | `a7` | `sp`, `usp`, `ssp`, `isp` | > **Notes**: > - TI does not mandate a frame pointer for MSP430, but toolchains are allowed @@ -98,7 +107,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect | Architecture | Unsupported register | Reason | | ------------ | --------------------------------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | | All | `sp` | The stack pointer must be restored to its original value at the end of an asm code block. | -| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR), `r4` (MSP430) | The frame pointer cannot be used as an input or output. | +| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR), `r4` (MSP430), `a6` (M68k) | The frame pointer cannot be used as an input or output. | | All | `r19` (Hexagon) | This is used internally by LLVM as a "base pointer" for functions with complex stack frames. | | MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. | | MIPS | `$1` or `$at` | Reserved for assembler. | @@ -108,6 +117,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect | Hexagon | `lr` | This is the link register which cannot be used as an input or output. | | AVR | `r0`, `r1`, `r1r0` | Due to an issue in LLVM, the `r0` and `r1` registers cannot be used as inputs or outputs. If modified, they must be restored to their original values before the end of the block. | |MSP430 | `r0`, `r2`, `r3` | These are the program counter, status register, and constant generator respectively. Neither the status register nor constant generator can be written to. | +| M68k | `a4`, `a5` | Used internally by LLVM for the base pointer and global base pointer. | ## Template modifiers @@ -130,3 +140,5 @@ These flags registers must be restored upon exiting the asm block if the `preser - The status register `SREG`. - MSP430 - The status register `r2`. +- M68k + - The condition code register `ccr`. diff --git a/tests/assembly/asm/m68k-types.rs b/tests/assembly/asm/m68k-types.rs new file mode 100644 index 00000000000..0322e615a19 --- /dev/null +++ b/tests/assembly/asm/m68k-types.rs @@ -0,0 +1,83 @@ +// assembly-output: emit-asm +// compile-flags: --target m68k-unknown-linux-gnu +// needs-llvm-components: m68k + +#![feature(no_core, lang_items, rustc_attrs, asm_experimental_arch)] +#![crate_type = "rlib"] +#![no_core] +#![allow(non_camel_case_types)] + +#[rustc_builtin_macro] +macro_rules! asm { + () => {}; +} +#[rustc_builtin_macro] +macro_rules! concat { + () => {}; +} + +#[lang = "sized"] +trait Sized {} +#[lang = "copy"] +trait Copy {} + +type ptr = *const u64; + +impl Copy for i8 {} +impl Copy for i16 {} +impl Copy for i32 {} +impl Copy for i64 {} +impl Copy for ptr {} + +macro_rules! check { + ($func:ident $ty:ident $class:ident $mov:literal) => { + #[no_mangle] + pub unsafe fn $func(x: $ty) -> $ty { + let y; + asm!(concat!($mov, " {}, {};"), out($class) y, in($class) x); + y + } + }; +} + +// CHECK-LABEL: reg_data_i8: +// CHECK: ;APP +// CHECK: move.b %d{{[0-9]}}, %d{{[0-9]}} +// CHECK: ;NO_APP +check!(reg_data_i8 i8 reg_data "move.b"); + +// CHECK-LABEL: reg_data_i16: +// CHECK: ;APP +// CHECK: move.w %d{{[0-9]}}, %d{{[0-9]}} +// CHECK: ;NO_APP +check!(reg_data_i16 i16 reg_data "move.w"); + +// CHECK-LABEL: reg_data_i32: +// CHECK: ;APP +// CHECK: move.l %d{{[0-9]}}, %d{{[0-9]}} +// CHECK: ;NO_APP +check!(reg_data_i32 i32 reg_data "move.l"); + +// CHECK-LABEL: reg_addr_i16: +// CHECK: ;APP +// CHECK: move.w %a{{[0-9]}}, %a{{[0-9]}} +// CHECK: ;NO_APP +check!(reg_addr_i16 i16 reg_addr "move.w"); + +// CHECK-LABEL: reg_addr_i32: +// CHECK: ;APP +// CHECK: move.l %a{{[0-9]}}, %a{{[0-9]}} +// CHECK: ;NO_APP +check!(reg_addr_i32 i32 reg_addr "move.l"); + +// CHECK-LABEL: reg_i16: +// CHECK: ;APP +// CHECK: move.w %{{[da][0-9]}}, %{{[da][0-9]}} +// CHECK: ;NO_APP +check!(reg_i16 i16 reg "move.w"); + +// CHECK-LABEL: reg_i32: +// CHECK: ;APP +// CHECK: move.l %{{[da][0-9]}}, %{{[da][0-9]}} +// CHECK: ;NO_APP +check!(reg_i32 i32 reg "move.l"); |