diff options
| -rw-r--r-- | compiler/rustc_target/src/spec/armv5te_none_eabi.rs | 50 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/mod.rs | 2 | ||||
| -rw-r--r-- | compiler/rustc_target/src/spec/thumbv5te_none_eabi.rs | 41 | ||||
| -rw-r--r-- | src/doc/rustc/src/SUMMARY.md | 1 | ||||
| -rw-r--r-- | src/doc/rustc/src/platform-support.md | 2 | ||||
| -rw-r--r-- | src/doc/rustc/src/platform-support/armv5te-none-eabi.md | 75 |
6 files changed, 171 insertions, 0 deletions
diff --git a/compiler/rustc_target/src/spec/armv5te_none_eabi.rs b/compiler/rustc_target/src/spec/armv5te_none_eabi.rs new file mode 100644 index 00000000000..c78928be0d2 --- /dev/null +++ b/compiler/rustc_target/src/spec/armv5te_none_eabi.rs @@ -0,0 +1,50 @@ +//! Targets the ARMv5TE, with code as `a32` code by default. + +use crate::spec::{ + cvs, LinkerFlavor, LldFlavor, PanicStrategy, RelocModel, Target, TargetOptions +}; + +pub fn target() -> Target { + Target { + llvm_target: "armv5te-none-eabi".into(), + pointer_width: 32, + arch: "arm".into(), + /* Data layout args are '-' separated: + * little endian + * stack is 64-bit aligned (EABI) + * pointers are 32-bit + * i64 must be 64-bit aligned (EABI) + * mangle names with ELF style + * native integers are 32-bit + * All other elements are default + */ + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + + options: TargetOptions { + abi: "eabi".into(), + linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld), + linker: Some("rust-lld".into()), + // extra args passed to the external assembler (assuming `arm-none-eabi-as`): + // * activate t32/a32 interworking + // * use arch ARMv5TE + // * use little-endian + asm_args: cvs!["-mthumb-interwork", "-march=armv5te", "-mlittle-endian",], + // minimum extra features, these cannot be disabled via -C + // Also force-enable 32-bit atomics, which allows the use of atomic load/store only. + // The resulting atomics are ABI incompatible with atomics backed by libatomic. + features: "+soft-float,+strict-align,+atomics-32".into(), + main_needs_argc_argv: false, + // don't have atomic compare-and-swap + atomic_cas: false, + has_thumb_interworking: true, + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + // from thumb_base, rust-lang/rust#44993. + emit_debug_gdb_scripts: false, + // from thumb_base, apparently gcc/clang give enums a minimum of 8 bits on no-os targets + c_enum_min_bits: 8, + + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 2459b0280cd..6ddb50989b4 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -1082,6 +1082,8 @@ supported_targets! { ("mipsel-unknown-none", mipsel_unknown_none), ("thumbv4t-none-eabi", thumbv4t_none_eabi), ("armv4t-none-eabi", armv4t_none_eabi), + ("thumbv5te-none-eabi", thumbv5te_none_eabi), + ("armv5te-none-eabi", armv5te_none_eabi), ("aarch64_be-unknown-linux-gnu", aarch64_be_unknown_linux_gnu), ("aarch64-unknown-linux-gnu_ilp32", aarch64_unknown_linux_gnu_ilp32), diff --git a/compiler/rustc_target/src/spec/thumbv5te_none_eabi.rs b/compiler/rustc_target/src/spec/thumbv5te_none_eabi.rs new file mode 100644 index 00000000000..021b0e0eb62 --- /dev/null +++ b/compiler/rustc_target/src/spec/thumbv5te_none_eabi.rs @@ -0,0 +1,41 @@ +//! Targets the ARMv5TE, with code as `t32` code by default. + +use crate::spec::{cvs, FramePointer, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv5te-none-eabi".into(), + pointer_width: 32, + arch: "arm".into(), + /* Data layout args are '-' separated: + * little endian + * stack is 64-bit aligned (EABI) + * pointers are 32-bit + * i64 must be 64-bit aligned (EABI) + * mangle names with ELF style + * native integers are 32-bit + * All other elements are default + */ + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + + options: TargetOptions { + abi: "eabi".into(), + // extra args passed to the external assembler (assuming `arm-none-eabi-as`): + // * activate t32/a32 interworking + // * use arch ARMv5TE + // * use little-endian + asm_args: cvs!["-mthumb-interwork", "-march=armv5te", "-mlittle-endian",], + // minimum extra features, these cannot be disabled via -C + // Also force-enable 32-bit atomics, which allows the use of atomic load/store only. + // The resulting atomics are ABI incompatible with atomics backed by libatomic. + features: "+soft-float,+strict-align,+atomics-32".into(), + frame_pointer: FramePointer::MayOmit, + main_needs_argc_argv: false, + // don't have atomic compare-and-swap + atomic_cas: false, + has_thumb_interworking: true, + + ..super::thumb_base::opts() + }, + } +} diff --git a/src/doc/rustc/src/SUMMARY.md b/src/doc/rustc/src/SUMMARY.md index 4e6bc41daa7..1dcd2aaf79a 100644 --- a/src/doc/rustc/src/SUMMARY.md +++ b/src/doc/rustc/src/SUMMARY.md @@ -19,6 +19,7 @@ - [\*-apple-watchos\*](platform-support/apple-watchos.md) - [aarch64-nintendo-switch-freestanding](platform-support/aarch64-nintendo-switch-freestanding.md) - [armv4t-none-eabi](platform-support/armv4t-none-eabi.md) + - [armv5te-none-eabi](platform-support/armv5te-none-eabi.md) - [armv6k-nintendo-3ds](platform-support/armv6k-nintendo-3ds.md) - [armv7-unknown-linux-uclibceabi](platform-support/armv7-unknown-linux-uclibceabi.md) - [armv7-unknown-linux-uclibceabihf](platform-support/armv7-unknown-linux-uclibceabihf.md) diff --git a/src/doc/rustc/src/platform-support.md b/src/doc/rustc/src/platform-support.md index 742fbe11d9c..b84e5f6c708 100644 --- a/src/doc/rustc/src/platform-support.md +++ b/src/doc/rustc/src/platform-support.md @@ -225,6 +225,7 @@ target | std | host | notes [`arm64_32-apple-watchos`](platform-support/apple-watchos.md) | ✓ | | ARM Apple WatchOS 64-bit with 32-bit pointers `armv4t-none-eabi` | * | | ARMv4T A32 `armv4t-unknown-linux-gnueabi` | ? | | +[`armv5te-none-eabi`](platform-support/armv5te-none-eabi.md) | * | | ARMv5TE A32 `armv5te-unknown-linux-uclibceabi` | ? | | ARMv5TE Linux with uClibc `armv6-unknown-freebsd` | ✓ | ✓ | ARMv6 FreeBSD `armv6-unknown-netbsd-eabihf` | ? | | @@ -291,6 +292,7 @@ target | std | host | notes `sparc64-unknown-netbsd` | ✓ | ✓ | NetBSD/sparc64 [`sparc64-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/sparc64 `thumbv4t-none-eabi` | * | | ARMv4T T32 +[`thumbv5te-none-eabi`](platform-support/armv5te-none-eabi.md) | * | | ARMv5TE T32 `thumbv7a-pc-windows-msvc` | ? | | `thumbv7a-uwp-windows-msvc` | ✓ | | `thumbv7neon-unknown-linux-musleabihf` | ? | | Thumb2-mode ARMv7a Linux with NEON, MUSL diff --git a/src/doc/rustc/src/platform-support/armv5te-none-eabi.md b/src/doc/rustc/src/platform-support/armv5te-none-eabi.md new file mode 100644 index 00000000000..e7e9aaba54b --- /dev/null +++ b/src/doc/rustc/src/platform-support/armv5te-none-eabi.md @@ -0,0 +1,75 @@ +# `armv5te-none-eabi` + +**Tier: 3** + +Bare-metal target for any cpu in the ARMv5TE architecture family, supporting +ARM/Thumb code interworking (aka `a32`/`t32`), with ARM code as the default code +generation. + +The `thumbv5te-none-eabi` target is the same as this one, but with THUMB code as the default. + +In particular this supports the main CPU of the Nintendo DS, but there's nothing DS +specific with this target, so any ARMv5TE device should work fine. + +## Target Maintainers + +* [@QuinnPainter](https://github.com/QuinnPainter) + +## Requirements + +The target is cross-compiled, and uses static linking. + +By default, the `lld` linker included with Rust will be used. + +However, you may want to use the `arm-none-eabi-ld` linker instead. This can be obtained for Windows/Mac/Linux from the [ARM +Developer Website][arm-dev], or possibly from your OS's package manager. To use it, add the following to your `.cargo/config.toml`: + +```toml +[target.armv5te-none-eabi] +linker = "arm-none-eabi-ld" +``` + +[arm-dev]: https://developer.arm.com/Tools%20and%20Software/GNU%20Toolchain + +This target doesn't provide a linker script, you'll need to bring your own +according to the specific device you want to target. Pass +`-Clink-arg=-Tyour_script.ld` as a rustc argument to make the linker use +`your_script.ld` during linking. + +## Building Rust Programs + +Because it is Tier 3, rust does not yet ship pre-compiled artifacts for this target. + +Just use the `build-std` nightly cargo feature to build the `core` library. You +can pass this as a command line argument to cargo, or your `.cargo/config.toml` +file might include the following lines: + +```toml +[unstable] +build-std = ["core"] +``` + +Most of `core` should work as expected, with the following notes: +* the target is "soft float", so `f32` and `f64` operations are emulated in + software. +* integer division is also emulated in software. +* the target is old enough that it doesn't have atomic instructions. + +`alloc` is also supported, as long as you provide your own global allocator. + +Rust programs are output as ELF files. + +For running on DS hardware, you'll need to use an external tool to bundle this ELF file into an NDS binary. The `ndstool` utility included with devkitARM is one such tool that can do this for you: + +```shell +ndstool -c [out_nds] -9 [in_elf] +``` + +## Testing + +This is a cross-compiled target that you will need to emulate during testing. + +Because this is a device-agnostic target, and the exact emulator that you'll +need depends on the specific device you want to run your code on. + +For example, when programming for the DS, you can use one of the several available DS emulators, such as [melonDS](https://melonds.kuribo64.net/). |