diff options
Diffstat (limited to 'sbc/sbc_primitives_mmx.c')
| -rw-r--r-- | sbc/sbc_primitives_mmx.c | 49 |
1 files changed, 9 insertions, 40 deletions
diff --git a/sbc/sbc_primitives_mmx.c b/sbc/sbc_primitives_mmx.c index e2c3e56..6984ce5 100644 --- a/sbc/sbc_primitives_mmx.c +++ b/sbc/sbc_primitives_mmx.c @@ -350,50 +350,19 @@ static void sbc_calc_scalefactors_mmx( __asm__ volatile ("emms\n"); } -static int check_mmx_support(void) +void sbc_init_primitives_mmx(struct sbc_encoder_state *state) { -#ifdef __amd64__ - return 1; /* We assume that all 64-bit processors have MMX support */ -#else - int cpuid_feature_information; - __asm__ volatile ( - /* According to Intel manual, CPUID instruction is supported - * if the value of ID bit (bit 21) in EFLAGS can be modified */ - "pushf\n" - "movl (%%esp), %0\n" - "xorl $0x200000, (%%esp)\n" /* try to modify ID bit */ - "popf\n" - "pushf\n" - "xorl (%%esp), %0\n" /* check if ID bit changed */ - "jz 1f\n" - "push %%eax\n" - "push %%ebx\n" - "push %%ecx\n" - "mov $1, %%eax\n" - "cpuid\n" - "pop %%ecx\n" - "pop %%ebx\n" - "pop %%eax\n" - "1:\n" - "popf\n" - : "=d" (cpuid_feature_information) - : - : "cc"); - return cpuid_feature_information & (1 << 23); -#endif + state->sbc_analyze_4s = sbc_analyze_4b_4s_mmx; + if (state->increment == 1) + state->sbc_analyze_8s = sbc_analyze_1b_8s_mmx_odd; + else + state->sbc_analyze_8s = sbc_analyze_4b_8s_mmx; + state->sbc_calc_scalefactors = sbc_calc_scalefactors_mmx; + state->implementation_info = "MMX"; } +#else void sbc_init_primitives_mmx(struct sbc_encoder_state *state) { - if (check_mmx_support()) { - state->sbc_analyze_4s = sbc_analyze_4b_4s_mmx; - if (state->increment == 1) - state->sbc_analyze_8s = sbc_analyze_1b_8s_mmx_odd; - else - state->sbc_analyze_8s = sbc_analyze_4b_8s_mmx; - state->sbc_calc_scalefactors = sbc_calc_scalefactors_mmx; - state->implementation_info = "MMX"; - } } - #endif |