diff options
author | H. Peter Anvin <hpa@zytor.com> | 2012-03-30 16:05:38 -0700 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2012-03-30 16:06:56 -0700 |
commit | 9787a5c552d37b26550de38578c338fa92232545 (patch) | |
tree | 2c3f440b4e6dae9251691c7b6951e8181f09cddb /core | |
parent | ccf954c113e87a16527fbc8c92d69895bf16a617 (diff) | |
download | syslinux-9787a5c552d37b26550de38578c338fa92232545.tar.gz |
pxeisr: Use nonspecific EOI; add pxe_poll routine; CLD
Use nonspecific EOI to signal the PIC, as that seems to be what other
BIOS software does.
Add a pxe_poll routine which can be used rather than doing the
equivalent from protected mode.
Run CLD on entry to pxe_isr.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'core')
-rw-r--r-- | core/fs/pxe/pxe.h | 1 | ||||
-rw-r--r-- | core/pxeisr.inc | 58 |
2 files changed, 49 insertions, 10 deletions
diff --git a/core/fs/pxe/pxe.h b/core/fs/pxe/pxe.h index d347f9e0..26cec628 100644 --- a/core/fs/pxe/pxe.h +++ b/core/fs/pxe/pxe.h @@ -186,6 +186,7 @@ extern const uint8_t TimeoutTable[]; extern uint8_t pxe_irq_vector; extern void pxe_isr(void); extern far_ptr_t pxe_irq_chain; +extern void pxe_poll(void); /* isr.c */ void pxe_init_isr(void); diff --git a/core/pxeisr.inc b/core/pxeisr.inc index 1c3e90a9..a1db334e 100644 --- a/core/pxeisr.inc +++ b/core/pxeisr.inc @@ -5,6 +5,7 @@ global pxe_isr pxe_isr: + cld pusha push ds push es @@ -36,17 +37,11 @@ pxe_isr: ; leftover BC doesn't get control. mov byte [pxe_irq_pending],1 - mov al,[pxe_irq_vector] - cmp al,8 - jae .aux_pic + cmp byte [pxe_irq_vector], 8 + mov al,0x20 ; Non-specific EOI + jb .pri_pic - add al,0x60 ; Specific EOI - jmp .pri_pic - -.aux_pic: - add al,0x60-8 - out 0xA0,al ; Secondary PIC - mov al,0x62 ; Specific EOI, cascade interrupt + out 0xA0, al ; Secondary PIC .pri_pic: out 0x20,al ; Primary PIC @@ -67,6 +62,49 @@ pxe_isr: global pxe_irq_chain pxe_irq_chain equ $-4 + +; Emulate a PXE interrupt from the polling thread + global pxe_poll +pxe_poll: + pushf + cli + cld + pusha + push ds + push es + push fs + push gs + + mov bx,PXENV_UNDI_ISR + mov di,pxenv_undi_isr_buf + + mov cx,pxenv_undi_isr_buf.size/2 + push di + rep stosw + pop di + + mov byte [pxenv_undi_isr_buf.funcflag],PXENV_UNDI_ISR_IN_START + + call pxenv + jc .notus + + cmp word [pxenv_undi_isr_buf.funcflag],PXENV_UNDI_ISR_OUT_OURS + jne .notus + + ; Its ours - set the flag for the return to PM. + ; We need to EOI this ourselves, so that the + ; leftover BC doesn't get control. + mov byte [pxe_irq_pending],1 + +.notus: + pop gs + pop fs + pop es + pop ds + popa + popf + ret + section .bss16 alignb 4 pxenv_undi_isr_buf: |