summaryrefslogtreecommitdiff
path: root/gpxe/src/include/gpxe/efi/Uefi/UefiPxe.h
blob: bb8ab410c85eb18e37677febcde1832cf3a3cbbd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
/** @file
  This header file contains all of the PXE type definitions,
  structure prototypes, global variables and constants that
  are needed for porting PXE to EFI.

  Copyright (c) 2006 - 2008, Intel Corporation
  All rights reserved. This program and the accompanying materials
  are licensed and made available under the terms and conditions of the BSD License
  which accompanies this distribution.  The full text of the license may be found at
  http://opensource.org/licenses/bsd-license.php

  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

  @par Revision Reference:
  32/64-bit PXE specification:
  alpha-4, 99-Dec-17

**/

#ifndef __EFI_PXE_H__
#define __EFI_PXE_H__

#pragma pack(1)

#define PXE_BUSTYPE(a, b, c, d) \
    ( \
      (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \
        ((PXE_UINT32) (a) & 0xFF) \
    )

///
/// UNDI ROM ID and devive ID signature
///
#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')

///
/// BUS ROM ID signatures
///
#define PXE_BUSTYPE_PCI     PXE_BUSTYPE ('P', 'C', 'I', 'R')
#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
#define PXE_BUSTYPE_USB     PXE_BUSTYPE ('U', 'S', 'B', 'R')
#define PXE_BUSTYPE_1394    PXE_BUSTYPE ('1', '3', '9', '4')

#define PXE_SWAP_UINT16(n)  ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))

#define PXE_SWAP_UINT32(n) \
  ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
   (((PXE_UINT32)(n) & 0x0000FF00) << 8)  | \
   (((PXE_UINT32)(n) & 0x00FF0000) >> 8)  | \
   (((PXE_UINT32)(n) & 0xFF000000) >> 24))

#define PXE_SWAP_UINT64(n) \
  ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \
   (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \
   (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \
   (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8)  | \
   (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8)  | \
   (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \
   (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
   (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))


#define PXE_CPBSIZE_NOT_USED  0               ///< zero
#define PXE_DBSIZE_NOT_USED   0               ///< zero
#define PXE_CPBADDR_NOT_USED  (PXE_UINT64) 0  ///< zero
#define PXE_DBADDR_NOT_USED   (PXE_UINT64) 0  ///< zero
#define PXE_CONST             CONST

#define PXE_VOLATILE          volatile

typedef VOID           PXE_VOID;
typedef UINT8          PXE_UINT8;
typedef UINT16         PXE_UINT16;
typedef UINT32         PXE_UINT32;
typedef UINTN          PXE_UINTN;

///
/// typedef unsigned long PXE_UINT64;
///
typedef UINT64      PXE_UINT64;

typedef PXE_UINT8 PXE_BOOL;
#define PXE_FALSE 0            ///< zero
#define PXE_TRUE  (!PXE_FALSE)

typedef PXE_UINT16      PXE_OPCODE;

///
/// Return UNDI operational state.
///
#define PXE_OPCODE_GET_STATE  0x0000

///
/// Change UNDI operational state from Stopped to Started.
///
#define PXE_OPCODE_START  0x0001

///
/// Change UNDI operational state from Started to Stopped.
///
#define PXE_OPCODE_STOP 0x0002

///
/// Get UNDI initialization information.
///
#define PXE_OPCODE_GET_INIT_INFO  0x0003

///
/// Get NIC configuration information.
///
#define PXE_OPCODE_GET_CONFIG_INFO  0x0004

///
/// Changed UNDI operational state from Started to Initialized.
///
#define PXE_OPCODE_INITIALIZE 0x0005

///
/// Re-initialize the NIC H/W.
///
#define PXE_OPCODE_RESET  0x0006

///
/// Change the UNDI operational state from Initialized to Started.
///
#define PXE_OPCODE_SHUTDOWN 0x0007

///
/// Read & change state of external interrupt enables.
///
#define PXE_OPCODE_INTERRUPT_ENABLES  0x0008

///
/// Read & change state of packet receive filters.
///
#define PXE_OPCODE_RECEIVE_FILTERS  0x0009

///
/// Read & change station MAC address.
///
#define PXE_OPCODE_STATION_ADDRESS  0x000A

///
/// Read traffic statistics.
///
#define PXE_OPCODE_STATISTICS 0x000B

///
/// Convert multicast IP address to multicast MAC address.
///
#define PXE_OPCODE_MCAST_IP_TO_MAC  0x000C

///
/// Read or change non-volatile storage on the NIC.
///
#define PXE_OPCODE_NVDATA 0x000D

///
/// Get & clear interrupt status.
///
#define PXE_OPCODE_GET_STATUS 0x000E

///
/// Fill media header in packet for transmit.
///
#define PXE_OPCODE_FILL_HEADER  0x000F

///
/// Transmit packet(s).
///
#define PXE_OPCODE_TRANSMIT 0x0010

///
/// Receive packet.
///
#define PXE_OPCODE_RECEIVE  0x0011

///
/// Last valid PXE UNDI OpCode number.
///
#define PXE_OPCODE_LAST_VALID 0x0011

typedef PXE_UINT16  PXE_OPFLAGS;

#define PXE_OPFLAGS_NOT_USED  0x0000

//
// //////////////////////////////////////
// UNDI Get State
//
// No OpFlags

////////////////////////////////////////
// UNDI Start
//
// No OpFlags

////////////////////////////////////////
// UNDI Stop
//
// No OpFlags

////////////////////////////////////////
// UNDI Get Init Info
//
// No Opflags

////////////////////////////////////////
// UNDI Get Config Info
//
// No Opflags

///
/// UNDI Initialize
///
#define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK    0x0001
#define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE         0x0000
#define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE  0x0001

///
///
/// UNDI Reset
///
#define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS  0x0001
#define PXE_OPFLAGS_RESET_DISABLE_FILTERS     0x0002

///
/// UNDI Shutdown
///
/// No OpFlags

///
/// UNDI Interrupt Enables
///
///
/// Select whether to enable or disable external interrupt signals.
/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
///
#define PXE_OPFLAGS_INTERRUPT_OPMASK  0xC000
#define PXE_OPFLAGS_INTERRUPT_ENABLE  0x8000
#define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
#define PXE_OPFLAGS_INTERRUPT_READ    0x0000

///
/// Enable receive interrupts.  An external interrupt will be generated
/// after a complete non-error packet has been received.
///
#define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001

///
/// Enable transmit interrupts.  An external interrupt will be generated
/// after a complete non-error packet has been transmitted.
///
#define PXE_OPFLAGS_INTERRUPT_TRANSMIT  0x0002

///
/// Enable command interrupts.  An external interrupt will be generated
/// when command execution stops.
///
#define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004

///
/// Generate software interrupt.  Setting this bit generates an external
/// interrupt, if it is supported by the hardware.
///
#define PXE_OPFLAGS_INTERRUPT_SOFTWARE  0x0008

///
/// UNDI Receive Filters
///
///
/// Select whether to enable or disable receive filters.
/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
///
#define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK   0xC000
#define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE   0x8000
#define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE  0x4000
#define PXE_OPFLAGS_RECEIVE_FILTER_READ     0x0000

///
/// To reset the contents of the multicast MAC address filter list,
/// set this OpFlag:
///
#define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000

///
/// Enable unicast packet receiving.  Packets sent to the current station
/// MAC address will be received.
///
#define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST  0x0001

///
/// Enable broadcast packet receiving.  Packets sent to the broadcast
/// MAC address will be received.
///
#define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST  0x0002

///
/// Enable filtered multicast packet receiving.  Packets sent to any
/// of the multicast MAC addresses in the multicast MAC address filter
/// list will be received.  If the filter list is empty, no multicast
///
#define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004

///
/// Enable promiscuous packet receiving.  All packets will be received.
///
#define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008

///
/// Enable promiscuous multicast packet receiving.  All multicast
/// packets will be received.
///
#define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010

///
/// UNDI Station Address
///
#define PXE_OPFLAGS_STATION_ADDRESS_READ   0x0000
#define PXE_OPFLAGS_STATION_ADDRESS_WRITE  0x0000
#define PXE_OPFLAGS_STATION_ADDRESS_RESET  0x0001

///
/// UNDI Statistics
///
#define PXE_OPFLAGS_STATISTICS_READ   0x0000
#define PXE_OPFLAGS_STATISTICS_RESET  0x0001

///
/// UNDI MCast IP to MAC
///
///
/// Identify the type of IP address in the CPB.
///
#define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK  0x0003
#define PXE_OPFLAGS_MCAST_IPV4_TO_MAC       0x0000
#define PXE_OPFLAGS_MCAST_IPV6_TO_MAC       0x0001

///
/// UNDI NvData
///
///
/// Select the type of non-volatile data operation.
///
#define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
#define PXE_OPFLAGS_NVDATA_READ   0x0000
#define PXE_OPFLAGS_NVDATA_WRITE  0x0001

///
/// UNDI Get Status
///
///
/// Return current interrupt status.  This will also clear any interrupts
/// that are currently set.  This can be used in a polling routine.  The
/// interrupt flags are still set and cleared even when the interrupts
/// are disabled.
///
#define PXE_OPFLAGS_GET_INTERRUPT_STATUS  0x0001

///
/// Return list of transmitted buffers for recycling.  Transmit buffers
/// must not be changed or unallocated until they have recycled.  After
/// issuing a transmit command, wait for a transmit complete interrupt.
/// When a transmit complete interrupt is received, read the transmitted
/// buffers.  Do not plan on getting one buffer per interrupt.  Some
/// NICs and UNDIs may transmit multiple buffers per interrupt.
///
#define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002

///
/// UNDI Fill Header
///
#define PXE_OPFLAGS_FILL_HEADER_OPMASK      0x0001
#define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED  0x0001
#define PXE_OPFLAGS_FILL_HEADER_WHOLE       0x0000

///
/// UNDI Transmit
///
///
/// S/W UNDI only.  Return after the packet has been transmitted.  A
/// transmit complete interrupt will still be generated and the transmit
/// buffer will have to be recycled.
///
#define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK  0x0001
#define PXE_OPFLAGS_TRANSMIT_BLOCK          0x0001
#define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK     0x0000

#define PXE_OPFLAGS_TRANSMIT_OPMASK     0x0002
#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
#define PXE_OPFLAGS_TRANSMIT_WHOLE      0x0000

///
/// UNDI Receive
///
/// No OpFlags
///

///
/// PXE STATFLAGS
///
typedef PXE_UINT16  PXE_STATFLAGS;

#define PXE_STATFLAGS_INITIALIZE  0x0000

///
/// Common StatFlags that can be returned by all commands.
///
///
/// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
/// implemented by all UNDIs.  COMMAND_QUEUED is only needed by UNDIs
/// that support command queuing.
///
#define PXE_STATFLAGS_STATUS_MASK       0xC000
#define PXE_STATFLAGS_COMMAND_COMPLETE  0xC000
#define PXE_STATFLAGS_COMMAND_FAILED    0x8000
#define PXE_STATFLAGS_COMMAND_QUEUED    0x4000

///
/// UNDI Get State
///
#define PXE_STATFLAGS_GET_STATE_MASK        0x0003
#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
#define PXE_STATFLAGS_GET_STATE_STARTED     0x0001
#define PXE_STATFLAGS_GET_STATE_STOPPED     0x0000

///
/// UNDI Start
///
/// No additional StatFlags
///

///
/// UNDI Get Init Info
///
#define PXE_STATFLAGS_CABLE_DETECT_MASK           0x0001
#define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED  0x0000
#define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED      0x0001

///
/// UNDI Initialize
///
#define PXE_STATFLAGS_INITIALIZED_NO_MEDIA  0x0001

///
/// UNDI Reset
///
#define PXE_STATFLAGS_RESET_NO_MEDIA  0x0001

///
/// UNDI Shutdown
///
/// No additional StatFlags

///
/// UNDI Interrupt Enables
///
///
/// If set, receive interrupts are enabled.
///
#define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001

///
/// If set, transmit interrupts are enabled.
///
#define PXE_STATFLAGS_INTERRUPT_TRANSMIT  0x0002

///
/// If set, command interrupts are enabled.
///
#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004

///
/// UNDI Receive Filters
///

///
/// If set, unicast packets will be received.
///
#define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST  0x0001

///
/// If set, broadcast packets will be received.
///
#define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST  0x0002

///
/// If set, multicast packets that match up with the multicast address
/// filter list will be received.
///
#define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004

///
/// If set, all packets will be received.
///
#define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008

///
/// If set, all multicast packets will be received.
///
#define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010

///
/// UNDI Station Address
///
/// No additional StatFlags
///

///
/// UNDI Statistics
///
/// No additional StatFlags
///

///
//// UNDI MCast IP to MAC
////
//// No additional StatFlags

///
/// UNDI NvData
///
/// No additional StatFlags
///

///
/// UNDI Get Status
///

///
/// Use to determine if an interrupt has occurred.
///
#define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
#define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS  0x0000

///
/// If set, at least one receive interrupt occurred.
///
#define PXE_STATFLAGS_GET_STATUS_RECEIVE  0x0001

///
/// If set, at least one transmit interrupt occurred.
///
#define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002

///
/// If set, at least one command interrupt occurred.
///
#define PXE_STATFLAGS_GET_STATUS_COMMAND  0x0004

///
/// If set, at least one software interrupt occurred.
///
#define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008

///
/// This flag is set if the transmitted buffer queue is empty.  This flag
/// will be set if all transmitted buffer addresses get written into the DB.
///
#define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY  0x0010

///
/// This flag is set if no transmitted buffer addresses were written
/// into the DB.  (This could be because DBsize was too small.)
///
#define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN  0x0020

///
/// UNDI Fill Header
///
/// No additional StatFlags
///

///
/// UNDI Transmit
///
/// No additional StatFlags.

///
/// UNDI Receive
///

///
/// No additional StatFlags.
///
typedef PXE_UINT16  PXE_STATCODE;

#define PXE_STATCODE_INITIALIZE 0x0000

///
/// Common StatCodes returned by all UNDI commands, UNDI protocol functions
/// and BC protocol functions.
///
#define PXE_STATCODE_SUCCESS              0x0000

#define PXE_STATCODE_INVALID_CDB          0x0001
#define PXE_STATCODE_INVALID_CPB          0x0002
#define PXE_STATCODE_BUSY                 0x0003
#define PXE_STATCODE_QUEUE_FULL           0x0004
#define PXE_STATCODE_ALREADY_STARTED      0x0005
#define PXE_STATCODE_NOT_STARTED          0x0006
#define PXE_STATCODE_NOT_SHUTDOWN         0x0007
#define PXE_STATCODE_ALREADY_INITIALIZED  0x0008
#define PXE_STATCODE_NOT_INITIALIZED      0x0009
#define PXE_STATCODE_DEVICE_FAILURE       0x000A
#define PXE_STATCODE_NVDATA_FAILURE       0x000B
#define PXE_STATCODE_UNSUPPORTED          0x000C
#define PXE_STATCODE_BUFFER_FULL          0x000D
#define PXE_STATCODE_INVALID_PARAMETER    0x000E
#define PXE_STATCODE_INVALID_UNDI         0x000F
#define PXE_STATCODE_IPV4_NOT_SUPPORTED   0x0010
#define PXE_STATCODE_IPV6_NOT_SUPPORTED   0x0011
#define PXE_STATCODE_NOT_ENOUGH_MEMORY    0x0012
#define PXE_STATCODE_NO_DATA              0x0013

typedef PXE_UINT16  PXE_IFNUM;

///
/// This interface number must be passed to the S/W UNDI Start command.
///
#define PXE_IFNUM_START 0x0000

///
/// This interface number is returned by the S/W UNDI Get State and
/// Start commands if information in the CDB, CPB or DB is invalid.
///
#define PXE_IFNUM_INVALID 0x0000

typedef PXE_UINT16  PXE_CONTROL;

///
/// Setting this flag directs the UNDI to queue this command for later
/// execution if the UNDI is busy and it supports command queuing.
/// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
/// is returned.  If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
/// error is returned.
///
#define PXE_CONTROL_QUEUE_IF_BUSY 0x0002

///
/// These two bit values are used to determine if there are more UNDI
/// CDB structures following this one.  If the link bit is set, there
/// must be a CDB structure following this one.  Execution will start
/// on the next CDB structure as soon as this one completes successfully.
/// If an error is generated by this command, execution will stop.
///
#define PXE_CONTROL_LINK              0x0001
#define PXE_CONTROL_LAST_CDB_IN_LIST  0x0000

typedef PXE_UINT8   PXE_FRAME_TYPE;

#define PXE_FRAME_TYPE_NONE                     0x00
#define PXE_FRAME_TYPE_UNICAST                  0x01
#define PXE_FRAME_TYPE_BROADCAST                0x02
#define PXE_FRAME_TYPE_FILTERED_MULTICAST       0x03
#define PXE_FRAME_TYPE_PROMISCUOUS              0x04
#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST    0x05

#define PXE_FRAME_TYPE_MULTICAST                PXE_FRAME_TYPE_FILTERED_MULTICAST

typedef PXE_UINT32  PXE_IPV4;

typedef PXE_UINT32  PXE_IPV6[4];
#define PXE_MAC_LENGTH  32

typedef PXE_UINT8   PXE_MAC_ADDR[PXE_MAC_LENGTH];

typedef PXE_UINT8   PXE_IFTYPE;
typedef UINT16      PXE_MEDIA_PROTOCOL;

///
/// This information is from the ARP section of RFC 1700.
///
///     1 Ethernet (10Mb)                                    [JBP]
///     2 Experimental Ethernet (3Mb)                        [JBP]
///     3 Amateur Radio AX.25                                [PXK]
///     4 Proteon ProNET Token Ring                          [JBP]
///     5 Chaos                                              [GXP]
///     6 IEEE 802 Networks                                  [JBP]
///     7 ARCNET                                             [JBP]
///     8 Hyperchannel                                       [JBP]
///     9 Lanstar                                             [TU]
///    10 Autonet Short Address                             [MXB1]
///    11 LocalTalk                                         [JKR1]
///    12 LocalNet (IBM* PCNet or SYTEK* LocalNET)           [JXM]
///    13 Ultra link                                        [RXD2]
///    14 SMDS                                              [GXC1]
///    15 Frame Relay                                        [AGM]
///    16 Asynchronous Transmission Mode (ATM)              [JXB2]
///    17 HDLC                                               [JBP]
///    18 Fibre Channel                            [Yakov Rekhter]
///    19 Asynchronous Transmission Mode (ATM)      [Mark Laubach]
///    20 Serial Line                                        [JBP]
///    21 Asynchronous Transmission Mode (ATM)              [MXB1]
///
/// * Other names and brands may be claimed as the property of others.
///
#define PXE_IFTYPE_ETHERNET       0x01
#define PXE_IFTYPE_TOKENRING      0x04
#define PXE_IFTYPE_FIBRE_CHANNEL  0x12

typedef struct s_pxe_hw_undi {
  PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE
  PXE_UINT8   Len;            ///< sizeof(PXE_HW_UNDI)
  PXE_UINT8   Fudge;          ///< makes 8-bit cksum equal zero
  PXE_UINT8   Rev;            ///< PXE_ROMID_REV
  PXE_UINT8   IFcnt;          ///< physical connector count
  PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER
  PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER
  PXE_UINT16  reserved;       ///< zero, not used
  PXE_UINT32  Implementation; ///< implementation flags
  ///< reserved             ///< vendor use
  ///< UINT32 Status;       ///< status port
  ///< UINT32 Command;      ///< command port
  ///< UINT64 CDBaddr;      ///< CDB address port
  ///<
} PXE_HW_UNDI;

///
/// Status port bit definitions
///

///
/// UNDI operation state
///
#define PXE_HWSTAT_STATE_MASK   0xC0000000
#define PXE_HWSTAT_BUSY         0xC0000000
#define PXE_HWSTAT_INITIALIZED  0x80000000
#define PXE_HWSTAT_STARTED      0x40000000
#define PXE_HWSTAT_STOPPED      0x00000000

///
/// If set, last command failed
///
#define PXE_HWSTAT_COMMAND_FAILED 0x20000000

///
/// If set, identifies enabled receive filters
///
#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED           0x00000800
#define PXE_HWSTAT_BROADCAST_RX_ENABLED             0x00000400
#define PXE_HWSTAT_MULTICAST_RX_ENABLED             0x00000200
#define PXE_HWSTAT_UNICAST_RX_ENABLED               0x00000100

///
/// If set, identifies enabled external interrupts
///
#define PXE_HWSTAT_SOFTWARE_INT_ENABLED     0x00000080
#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED  0x00000040
#define PXE_HWSTAT_PACKET_RX_INT_ENABLED    0x00000020
#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010

///
/// If set, identifies pending interrupts
///
#define PXE_HWSTAT_SOFTWARE_INT_PENDING     0x00000008
#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING  0x00000004
#define PXE_HWSTAT_PACKET_RX_INT_PENDING    0x00000002
#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001

///
/// Command port definitions
///

///
/// If set, CDB identified in CDBaddr port is given to UNDI.
/// If not set, other bits in this word will be processed.
///
#define PXE_HWCMD_ISSUE_COMMAND   0x80000000
#define PXE_HWCMD_INTS_AND_FILTS  0x00000000

///
/// Use these to enable/disable receive filters.
///
#define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
#define PXE_HWCMD_PROMISCUOUS_RX_ENABLE           0x00000800
#define PXE_HWCMD_BROADCAST_RX_ENABLE             0x00000400
#define PXE_HWCMD_MULTICAST_RX_ENABLE             0x00000200
#define PXE_HWCMD_UNICAST_RX_ENABLE               0x00000100

///
/// Use these to enable/disable external interrupts
///
#define PXE_HWCMD_SOFTWARE_INT_ENABLE     0x00000080
#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE  0x00000040
#define PXE_HWCMD_PACKET_RX_INT_ENABLE    0x00000020
#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010

///
/// Use these to clear pending external interrupts
///
#define PXE_HWCMD_CLEAR_SOFTWARE_INT      0x00000008
#define PXE_HWCMD_CLEAR_TX_COMPLETE_INT   0x00000004
#define PXE_HWCMD_CLEAR_PACKET_RX_INT     0x00000002
#define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT  0x00000001

typedef struct s_pxe_sw_undi {
  PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE
  PXE_UINT8   Len;            ///< sizeof(PXE_SW_UNDI)
  PXE_UINT8   Fudge;          ///< makes 8-bit cksum zero
  PXE_UINT8   Rev;            ///< PXE_ROMID_REV
  PXE_UINT8   IFcnt;          ///< physical connector count
  PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER
  PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER
  PXE_UINT16  reserved1;      ///< zero, not used
  PXE_UINT32  Implementation; ///< Implementation flags
  PXE_UINT64  EntryPoint;     ///< API entry point
  PXE_UINT8   reserved2[3];   ///< zero, not used
  PXE_UINT8   BusCnt;         ///< number of bustypes supported
  PXE_UINT32  BusType[1];     ///< list of supported bustypes
} PXE_SW_UNDI;

typedef union u_pxe_undi {
  PXE_HW_UNDI hw;
  PXE_SW_UNDI sw;
} PXE_UNDI;

///
/// Signature of !PXE structure
///
#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')

///
/// !PXE structure format revision
///
#define PXE_ROMID_REV 0x02

///
/// UNDI command interface revision.  These are the values that get sent
/// in option 94 (Client Network Interface Identifier) in the DHCP Discover
/// and PXE Boot Server Request packets.
///
#define PXE_ROMID_MAJORVER    0x03
#define PXE_ROMID_MINORVER    0x01

///
/// Implementation flags
///
#define PXE_ROMID_IMP_HW_UNDI                             0x80000000
#define PXE_ROMID_IMP_SW_VIRT_ADDR                        0x40000000
#define PXE_ROMID_IMP_64BIT_DEVICE                        0x00010000
#define PXE_ROMID_IMP_FRAG_SUPPORTED                      0x00008000
#define PXE_ROMID_IMP_CMD_LINK_SUPPORTED                  0x00004000
#define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED                 0x00002000
#define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED               0x00001000
#define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK                 0x00000C00
#define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE                0x00000C00
#define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE              0x00000800
#define PXE_ROMID_IMP_NVDATA_READ_ONLY                    0x00000400
#define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE                0x00000000
#define PXE_ROMID_IMP_STATISTICS_SUPPORTED                0x00000200
#define PXE_ROMID_IMP_STATION_ADDR_SETTABLE               0x00000100
#define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED  0x00000080
#define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED            0x00000040
#define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED              0x00000020
#define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED     0x00000010
#define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED              0x00000008
#define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED           0x00000004
#define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED             0x00000002
#define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED          0x00000001

typedef struct s_pxe_cdb {
  PXE_OPCODE    OpCode;
  PXE_OPFLAGS   OpFlags;
  PXE_UINT16    CPBsize;
  PXE_UINT16    DBsize;
  PXE_UINT64    CPBaddr;
  PXE_UINT64    DBaddr;
  PXE_STATCODE  StatCode;
  PXE_STATFLAGS StatFlags;
  PXE_UINT16    IFnum;
  PXE_CONTROL   Control;
} PXE_CDB;

typedef union u_pxe_ip_addr {
  PXE_IPV6  IPv6;
  PXE_IPV4  IPv4;
} PXE_IP_ADDR;

typedef union pxe_device {
  ///
  /// PCI and PC Card NICs are both identified using bus, device
  /// and function numbers.  For PC Card, this may require PC
  /// Card services to be loaded in the BIOS or preboot
  /// environment.
  ///
  struct {
    ///
    /// See S/W UNDI ROMID structure definition for PCI and
    /// PCC BusType definitions.
    ///
    PXE_UINT32  BusType;

    ///
    /// Bus, device & function numbers that locate this device.
    ///
    PXE_UINT16  Bus;
    PXE_UINT8   Device;
    PXE_UINT8   Function;
  }
  PCI, PCC;

} PXE_DEVICE;

///
/// cpb and db definitions
///
#define MAX_PCI_CONFIG_LEN    64  ///< # of dwords
#define MAX_EEPROM_LEN        128 ///< # of dwords
#define MAX_XMIT_BUFFERS      32  ///< recycling Q length for xmit_done
#define MAX_MCAST_ADDRESS_CNT 8

typedef struct s_pxe_cpb_start_30 {
  ///
  /// PXE_VOID Delay(UINTN microseconds);
  ///
  /// UNDI will never request a delay smaller than 10 microseconds
  /// and will always request delays in increments of 10 microseconds.
  /// The Delay() CallBack routine must delay between n and n + 10
  /// microseconds before returning control to the UNDI.
  ///
  /// This field cannot be set to zero.
  ///
  UINT64  Delay;

  ///
  /// PXE_VOID Block(UINT32 enable);
  ///
  /// UNDI may need to block multi-threaded/multi-processor access to
  /// critical code sections when programming or accessing the network
  /// device.  To this end, a blocking service is needed by the UNDI.
  /// When UNDI needs a block, it will call Block() passing a non-zero
  /// value.  When UNDI no longer needs a block, it will call Block()
  /// with a zero value.  When called, if the Block() is already enabled,
  /// do not return control to the UNDI until the previous Block() is
  /// disabled.
  ///
  /// This field cannot be set to zero.
  ///
  UINT64  Block;

  ///
  /// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
  ///
  /// UNDI will pass the virtual address of a buffer and the virtual
  /// address of a 64-bit physical buffer.  Convert the virtual address
  /// to a physical address and write the result to the physical address
  /// buffer.  If virtual and physical addresses are the same, just
  /// copy the virtual address to the physical address buffer.
  ///
  /// This field can be set to zero if virtual and physical addresses
  /// are equal.
  ///
  UINT64  Virt2Phys;
  ///
  /// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
  ///              UINT64 buf_addr);
  ///
  /// UNDI will read or write the device io space using this call back
  /// function. It passes the number of bytes as the len parameter and it
  /// will be either 1,2,4 or 8.
  ///
  /// This field can not be set to zero.
  ///
  UINT64  Mem_IO;
} PXE_CPB_START_30;

typedef struct s_pxe_cpb_start_31 {
  ///
  /// PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);
  ///
  /// UNDI will never request a delay smaller than 10 microseconds
  /// and will always request delays in increments of 10 microseconds.
  /// The Delay() CallBack routine must delay between n and n + 10
  /// microseconds before returning control to the UNDI.
  ///
  /// This field cannot be set to zero.
  ///
  UINT64  Delay;

  ///
  /// PXE_VOID Block(UINT64 unq_id, UINT32 enable);
  ///
  /// UNDI may need to block multi-threaded/multi-processor access to
  /// critical code sections when programming or accessing the network
  /// device.  To this end, a blocking service is needed by the UNDI.
  /// When UNDI needs a block, it will call Block() passing a non-zero
  /// value.  When UNDI no longer needs a block, it will call Block()
  /// with a zero value.  When called, if the Block() is already enabled,
  /// do not return control to the UNDI until the previous Block() is
  /// disabled.
  ///
  /// This field cannot be set to zero.
  ///
  UINT64  Block;

  ///
  /// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
  ///
  /// UNDI will pass the virtual address of a buffer and the virtual
  /// address of a 64-bit physical buffer.  Convert the virtual address
  /// to a physical address and write the result to the physical address
  /// buffer.  If virtual and physical addresses are the same, just
  /// copy the virtual address to the physical address buffer.
  ///
  /// This field can be set to zero if virtual and physical addresses
  /// are equal.
  ///
  UINT64  Virt2Phys;
  ///
  /// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
  ///              UINT64 buf_addr);
  ///
  /// UNDI will read or write the device io space using this call back
  /// function. It passes the number of bytes as the len parameter and it
  /// will be either 1,2,4 or 8.
  ///
  /// This field can not be set to zero.
  ///
  UINT64  Mem_IO;
  ///
  /// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
  ///                 UINT32 Direction, UINT64 mapped_addr);
  ///
  /// UNDI will pass the virtual address of a buffer, direction of the data
  /// flow from/to the mapped buffer (the constants are defined below)
  /// and a place holder (pointer) for the mapped address.
  /// This call will Map the given address to a physical DMA address and write
  /// the result to the mapped_addr pointer.  If there is no need to
  /// map the given address to a lower address (i.e. the given address is
  /// associated with a physical address that is already compatible to be
  /// used with the DMA, it converts the given virtual address to it's
  /// physical address and write that in the mapped address pointer.
  ///
  /// This field can be set to zero if there is no mapping service available
  ///
  UINT64  Map_Mem;

  ///
  /// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
  ///            UINT32 Direction, UINT64 mapped_addr);
  ///
  /// UNDI will pass the virtual and mapped addresses of a buffer
  /// This call will un map the given address
  ///
  /// This field can be set to zero if there is no unmapping service available
  ///
  UINT64  UnMap_Mem;

  ///
  /// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
  ///            UINT32 size, UINT32 Direction, UINT64 mapped_addr);
  ///
  /// UNDI will pass the virtual and mapped addresses of a buffer
  /// This call will synchronize the contents of both the virtual and mapped
  /// buffers for the given Direction.
  ///
  /// This field can be set to zero if there is no service available
  ///
  UINT64  Sync_Mem;

  ///
  /// protocol driver can provide anything for this Unique_ID, UNDI remembers
  /// that as just a 64bit value assocaited to the interface specified by
  /// the ifnum and gives it back as a parameter to all the call-back routines
  /// when calling for that interface!
  ///
  UINT64  Unique_ID;
} PXE_CPB_START_31;

#define TO_AND_FROM_DEVICE    0
#define FROM_DEVICE           1
#define TO_DEVICE             2

#define PXE_DELAY_MILLISECOND 1000
#define PXE_DELAY_SECOND      1000000
#define PXE_IO_READ           0
#define PXE_IO_WRITE          1
#define PXE_MEM_READ          2
#define PXE_MEM_WRITE         4

typedef struct s_pxe_db_get_init_info {
  ///
  /// Minimum length of locked memory buffer that must be given to
  /// the Initialize command. Giving UNDI more memory will generally
  /// give better performance.
  ///
  /// If MemoryRequired is zero, the UNDI does not need and will not
  /// use system memory to receive and transmit packets.
  ///
  PXE_UINT32  MemoryRequired;

  ///
  /// Maximum frame data length for Tx/Rx excluding the media header.
  ///
  PXE_UINT32  FrameDataLen;

  ///
  /// Supported link speeds are in units of mega bits.  Common ethernet
  /// values are 10, 100 and 1000.  Unused LinkSpeeds[] entries are zero
  /// filled.
  ///
  PXE_UINT32  LinkSpeeds[4];

  ///
  /// Number of non-volatile storage items.
  ///
  PXE_UINT32  NvCount;

  ///
  /// Width of non-volatile storage item in bytes.  0, 1, 2 or 4
  ///
  PXE_UINT16  NvWidth;

  ///
  /// Media header length.  This is the typical media header length for
  /// this UNDI.  This information is needed when allocating receive
  /// and transmit buffers.
  ///
  PXE_UINT16  MediaHeaderLen;

  ///
  /// Number of bytes in the NIC hardware (MAC) address.
  ///
  PXE_UINT16  HWaddrLen;

  ///
  /// Maximum number of multicast MAC addresses in the multicast
  /// MAC address filter list.
  ///
  PXE_UINT16  MCastFilterCnt;

  ///
  /// Default number and size of transmit and receive buffers that will
  /// be allocated by the UNDI.  If MemoryRequired is non-zero, this
  /// allocation will come out of the memory buffer given to the Initialize
  /// command.  If MemoryRequired is zero, this allocation will come out of
  /// memory on the NIC.
  ///
  PXE_UINT16  TxBufCnt;
  PXE_UINT16  TxBufSize;
  PXE_UINT16  RxBufCnt;
  PXE_UINT16  RxBufSize;

  ///
  /// Hardware interface types defined in the Assigned Numbers RFC
  /// and used in DHCP and ARP packets.
  /// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
  ///
  PXE_UINT8   IFtype;

  ///
  /// Supported duplex.  See PXE_DUPLEX_xxxxx #defines below.
  ///
  PXE_UINT8   SupportedDuplexModes;

  ///
  /// Supported loopback options.  See PXE_LOOPBACK_xxxxx #defines below.
  ///
  PXE_UINT8   SupportedLoopBackModes;
} PXE_DB_GET_INIT_INFO;

#define PXE_MAX_TXRX_UNIT_ETHER           1500

#define PXE_HWADDR_LEN_ETHER              0x0006
#define PXE_MAC_HEADER_LEN_ETHER          0x000E

#define PXE_DUPLEX_ENABLE_FULL_SUPPORTED  1
#define PXE_DUPLEX_FORCE_FULL_SUPPORTED   2

#define PXE_LOOPBACK_INTERNAL_SUPPORTED   1
#define PXE_LOOPBACK_EXTERNAL_SUPPORTED   2

typedef struct s_pxe_pci_config_info {
  ///
  /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
  /// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
  ///
  UINT32  BusType;

  ///
  /// This identifies the PCI network device that this UNDI interface
  /// is bound to.
  ///
  UINT16  Bus;
  UINT8   Device;
  UINT8   Function;

  ///
  /// This is a copy of the PCI configuration space for this
  /// network device.
  ///
  union {
    UINT8   Byte[256];
    UINT16  Word[128];
    UINT32  Dword[64];
  } Config;
} PXE_PCI_CONFIG_INFO;

typedef struct s_pxe_pcc_config_info {
  ///
  /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
  /// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
  ///
  PXE_UINT32  BusType;

  ///
  /// This identifies the PCC network device that this UNDI interface
  /// is bound to.
  ///
  PXE_UINT16  Bus;
  PXE_UINT8   Device;
  PXE_UINT8   Function;

  ///
  /// This is a copy of the PCC configuration space for this
  /// network device.
  ///
  union {
    PXE_UINT8   Byte[256];
    PXE_UINT16  Word[128];
    PXE_UINT32  Dword[64];
  } Config;
} PXE_PCC_CONFIG_INFO;

typedef union u_pxe_db_get_config_info {
  PXE_PCI_CONFIG_INFO   pci;
  PXE_PCC_CONFIG_INFO   pcc;
} PXE_DB_GET_CONFIG_INFO;

typedef struct s_pxe_cpb_initialize {
  ///
  /// Address of first (lowest) byte of the memory buffer.  This buffer must
  /// be in contiguous physical memory and cannot be swapped out.  The UNDI
  /// will be using this for transmit and receive buffering.
  ///
  PXE_UINT64  MemoryAddr;

  ///
  /// MemoryLength must be greater than or equal to MemoryRequired
  /// returned by the Get Init Info command.
  ///
  PXE_UINT32  MemoryLength;

  ///
  /// Desired link speed in Mbit/sec.  Common ethernet values are 10, 100
  /// and 1000.  Setting a value of zero will auto-detect and/or use the
  /// default link speed (operation depends on UNDI/NIC functionality).
  ///
  PXE_UINT32  LinkSpeed;

  ///
  /// Suggested number and size of receive and transmit buffers to
  /// allocate.  If MemoryAddr and MemoryLength are non-zero, this
  /// allocation comes out of the supplied memory buffer.  If MemoryAddr
  /// and MemoryLength are zero, this allocation comes out of memory
  /// on the NIC.
  ///
  /// If these fields are set to zero, the UNDI will allocate buffer
  /// counts and sizes as it sees fit.
  ///
  PXE_UINT16  TxBufCnt;
  PXE_UINT16  TxBufSize;
  PXE_UINT16  RxBufCnt;
  PXE_UINT16  RxBufSize;

  ///
  /// The following configuration parameters are optional and must be zero
  /// to use the default values.
  ///
  PXE_UINT8   DuplexMode;

  PXE_UINT8   LoopBackMode;
} PXE_CPB_INITIALIZE;

#define PXE_DUPLEX_DEFAULT      0x00
#define PXE_FORCE_FULL_DUPLEX   0x01
#define PXE_ENABLE_FULL_DUPLEX  0x02
#define PXE_FORCE_HALF_DUPLEX   0x04
#define PXE_DISABLE_FULL_DUPLEX 0x08

#define LOOPBACK_NORMAL         0
#define LOOPBACK_INTERNAL       1
#define LOOPBACK_EXTERNAL       2

typedef struct s_pxe_db_initialize {
  ///
  /// Actual amount of memory used from the supplied memory buffer.  This
  /// may be less that the amount of memory suppllied and may be zero if
  /// the UNDI and network device do not use external memory buffers.
  ///
  /// Memory used by the UNDI and network device is allocated from the
  /// lowest memory buffer address.
  ///
  PXE_UINT32  MemoryUsed;

  ///
  /// Actual number and size of receive and transmit buffers that were
  /// allocated.
  ///
  PXE_UINT16  TxBufCnt;
  PXE_UINT16  TxBufSize;
  PXE_UINT16  RxBufCnt;
  PXE_UINT16  RxBufSize;
} PXE_DB_INITIALIZE;

typedef struct s_pxe_cpb_receive_filters {
  ///
  /// List of multicast MAC addresses.  This list, if present, will
  /// replace the existing multicast MAC address filter list.
  ///
  PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];
} PXE_CPB_RECEIVE_FILTERS;

typedef struct s_pxe_db_receive_filters {
  ///
  /// Filtered multicast MAC address list.
  ///
  PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];
} PXE_DB_RECEIVE_FILTERS;

typedef struct s_pxe_cpb_station_address {
  ///
  /// If supplied and supported, the current station MAC address
  /// will be changed.
  ///
  PXE_MAC_ADDR  StationAddr;
} PXE_CPB_STATION_ADDRESS;

typedef struct s_pxe_dpb_station_address {
  ///
  /// Current station MAC address.
  ///
  PXE_MAC_ADDR  StationAddr;

  ///
  /// Station broadcast MAC address.
  ///
  PXE_MAC_ADDR  BroadcastAddr;

  ///
  /// Permanent station MAC address.
  ///
  PXE_MAC_ADDR  PermanentAddr;
} PXE_DB_STATION_ADDRESS;

typedef struct s_pxe_db_statistics {
  ///
  /// Bit field identifying what statistic data is collected by the
  /// UNDI/NIC.
  /// If bit 0x00 is set, Data[0x00] is collected.
  /// If bit 0x01 is set, Data[0x01] is collected.
  /// If bit 0x20 is set, Data[0x20] is collected.
  /// If bit 0x21 is set, Data[0x21] is collected.
  /// Etc.
  ///
  PXE_UINT64  Supported;

  ///
  /// Statistic data.
  ///
  PXE_UINT64  Data[64];
} PXE_DB_STATISTICS;

///
/// Total number of frames received.  Includes frames with errors and
/// dropped frames.
///
#define PXE_STATISTICS_RX_TOTAL_FRAMES  0x00

///
/// Number of valid frames received and copied into receive buffers.
///
#define PXE_STATISTICS_RX_GOOD_FRAMES 0x01

///
/// Number of frames below the minimum length for the media.
/// This would be <64 for ethernet.
///
#define PXE_STATISTICS_RX_UNDERSIZE_FRAMES  0x02

///
/// Number of frames longer than the maxminum length for the
/// media.  This would be >1500 for ethernet.
///
#define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03

///
/// Valid frames that were dropped because receive buffers were full.
///
#define PXE_STATISTICS_RX_DROPPED_FRAMES  0x04

///
/// Number of valid unicast frames received and not dropped.
///
#define PXE_STATISTICS_RX_UNICAST_FRAMES  0x05

///
/// Number of valid broadcast frames received and not dropped.
///
#define PXE_STATISTICS_RX_BROADCAST_FRAMES  0x06

///
/// Number of valid mutlicast frames received and not dropped.
///
#define PXE_STATISTICS_RX_MULTICAST_FRAMES  0x07

///
/// Number of frames w/ CRC or alignment errors.
///
#define PXE_STATISTICS_RX_CRC_ERROR_FRAMES  0x08

///
/// Total number of bytes received.  Includes frames with errors
/// and dropped frames.
///
#define PXE_STATISTICS_RX_TOTAL_BYTES 0x09

///
/// Transmit statistics.
///
#define PXE_STATISTICS_TX_TOTAL_FRAMES      0x0A
#define PXE_STATISTICS_TX_GOOD_FRAMES       0x0B
#define PXE_STATISTICS_TX_UNDERSIZE_FRAMES  0x0C
#define PXE_STATISTICS_TX_OVERSIZE_FRAMES   0x0D
#define PXE_STATISTICS_TX_DROPPED_FRAMES    0x0E
#define PXE_STATISTICS_TX_UNICAST_FRAMES    0x0F
#define PXE_STATISTICS_TX_BROADCAST_FRAMES  0x10
#define PXE_STATISTICS_TX_MULTICAST_FRAMES  0x11
#define PXE_STATISTICS_TX_CRC_ERROR_FRAMES  0x12
#define PXE_STATISTICS_TX_TOTAL_BYTES       0x13

///
/// Number of collisions detection on this subnet.
///
#define PXE_STATISTICS_COLLISIONS 0x14

///
/// Number of frames destined for unsupported protocol.
///
#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15

typedef struct s_pxe_cpb_mcast_ip_to_mac {
  ///
  /// Multicast IP address to be converted to multicast MAC address.
  ///
  PXE_IP_ADDR IP;
} PXE_CPB_MCAST_IP_TO_MAC;

typedef struct s_pxe_db_mcast_ip_to_mac {
  ///
  /// Multicast MAC address.
  ///
  PXE_MAC_ADDR  MAC;
} PXE_DB_MCAST_IP_TO_MAC;

typedef struct s_pxe_cpb_nvdata_sparse {
  ///
  /// NvData item list.  Only items in this list will be updated.
  ///
  struct {
    ///
    ///  Non-volatile storage address to be changed.
    ///
    PXE_UINT32  Addr;

    ///
    /// Data item to write into above storage address.
    ///
    union {
      PXE_UINT8   Byte;
      PXE_UINT16  Word;
      PXE_UINT32  Dword;
    } Data;
  } Item[MAX_EEPROM_LEN];
} PXE_CPB_NVDATA_SPARSE;

///
/// When using bulk update, the size of the CPB structure must be
/// the same size as the non-volatile NIC storage.
///
typedef union u_pxe_cpb_nvdata_bulk {
  ///
  /// Array of byte-wide data items.
  ///
  PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];

  ///
  /// Array of word-wide data items.
  ///
  PXE_UINT16  Word[MAX_EEPROM_LEN << 1];

  ///
  /// Array of dword-wide data items.
  ///
  PXE_UINT32  Dword[MAX_EEPROM_LEN];
} PXE_CPB_NVDATA_BULK;

typedef struct s_pxe_db_nvdata {
  ///
  /// Arrays of data items from non-volatile storage.
  ///
  union {
    ///
    /// Array of byte-wide data items.
    ///
    PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];

    ///
    /// Array of word-wide data items.
    ///
    PXE_UINT16  Word[MAX_EEPROM_LEN << 1];

    ///
    /// Array of dword-wide data items.
    ///
    PXE_UINT32  Dword[MAX_EEPROM_LEN];
  } Data;
} PXE_DB_NVDATA;

typedef struct s_pxe_db_get_status {
  ///
  /// Length of next receive frame (header + data).  If this is zero,
  /// there is no next receive frame available.
  ///
  PXE_UINT32  RxFrameLen;

  ///
  /// Reserved, set to zero.
  ///
  PXE_UINT32  reserved;

  ///
  ///  Addresses of transmitted buffers that need to be recycled.
  ///
  PXE_UINT64  TxBuffer[MAX_XMIT_BUFFERS];
} PXE_DB_GET_STATUS;

typedef struct s_pxe_cpb_fill_header {
  ///
  /// Source and destination MAC addresses.  These will be copied into
  /// the media header without doing byte swapping.
  ///
  PXE_MAC_ADDR  SrcAddr;
  PXE_MAC_ADDR  DestAddr;

  ///
  /// Address of first byte of media header.  The first byte of packet data
  /// follows the last byte of the media header.
  ///
  PXE_UINT64        MediaHeader;

  ///
  /// Length of packet data in bytes (not including the media header).
  ///
  PXE_UINT32        PacketLen;

  ///
  /// Protocol type.  This will be copied into the media header without
  /// doing byte swapping.  Protocol type numbers can be obtained from
  /// the Assigned Numbers RFC 1700.
  ///
  PXE_UINT16        Protocol;

  ///
  /// Length of the media header in bytes.
  ///
  PXE_UINT16        MediaHeaderLen;
} PXE_CPB_FILL_HEADER;

#define PXE_PROTOCOL_ETHERNET_IP  0x0800
#define PXE_PROTOCOL_ETHERNET_ARP 0x0806
#define MAX_XMIT_FRAGMENTS        16

typedef struct s_pxe_cpb_fill_header_fragmented {
  ///
  /// Source and destination MAC addresses.  These will be copied into
  /// the media header without doing byte swapping.
  ///
  PXE_MAC_ADDR        SrcAddr;
  PXE_MAC_ADDR        DestAddr;

  ///
  /// Length of packet data in bytes (not including the media header).
  ///
  PXE_UINT32          PacketLen;

  ///
  /// Protocol type.  This will be copied into the media header without
  /// doing byte swapping.  Protocol type numbers can be obtained from
  /// the Assigned Numbers RFC 1700.
  ///
  PXE_MEDIA_PROTOCOL  Protocol;

  ///
  /// Length of the media header in bytes.
  ///
  PXE_UINT16          MediaHeaderLen;

  ///
  /// Number of packet fragment descriptors.
  ///
  PXE_UINT16          FragCnt;

  ///
  /// Reserved, must be set to zero.
  ///
  PXE_UINT16          reserved;

  ///
  /// Array of packet fragment descriptors.  The first byte of the media
  /// header is the first byte of the first fragment.
  ///
  struct {
    ///
    /// Address of this packet fragment.
    ///
    PXE_UINT64  FragAddr;

    ///
    /// Length of this packet fragment.
    ///
    PXE_UINT32  FragLen;

    ///
    /// Reserved, must be set to zero.
    ///
    PXE_UINT32  reserved;
  } FragDesc[MAX_XMIT_FRAGMENTS];
}
PXE_CPB_FILL_HEADER_FRAGMENTED;

typedef struct s_pxe_cpb_transmit {
  ///
  /// Address of first byte of frame buffer.  This is also the first byte
  /// of the media header.
  ///
  PXE_UINT64  FrameAddr;

  ///
  /// Length of the data portion of the frame buffer in bytes.  Do not
  /// include the length of the media header.
  ///
  PXE_UINT32  DataLen;

  ///
  /// Length of the media header in bytes.
  ///
  PXE_UINT16  MediaheaderLen;

  ///
  /// Reserved, must be zero.
  ///
  PXE_UINT16  reserved;
} PXE_CPB_TRANSMIT;

typedef struct s_pxe_cpb_transmit_fragments {
  ///
  /// Length of packet data in bytes (not including the media header).
  ///
  PXE_UINT32  FrameLen;

  ///
  /// Length of the media header in bytes.
  ///
  PXE_UINT16  MediaheaderLen;

  ///
  /// Number of packet fragment descriptors.
  ///
  PXE_UINT16  FragCnt;

  ///
  /// Array of frame fragment descriptors.  The first byte of the first
  /// fragment is also the first byte of the media header.
  ///
  struct {
    ///
    /// Address of this frame fragment.
    ///
    PXE_UINT64  FragAddr;

    ///
    /// Length of this frame fragment.
    ///
    PXE_UINT32  FragLen;

    ///
    /// Reserved, must be set to zero.
    ///
    PXE_UINT32  reserved;
  } FragDesc[MAX_XMIT_FRAGMENTS];
}
PXE_CPB_TRANSMIT_FRAGMENTS;

typedef struct s_pxe_cpb_receive {
  ///
  /// Address of first byte of receive buffer.  This is also the first byte
  /// of the frame header.
  ///
  PXE_UINT64  BufferAddr;

  ///
  /// Length of receive buffer.  This must be large enough to hold the
  /// received frame (media header + data).  If the length of smaller than
  /// the received frame, data will be lost.
  ///
  PXE_UINT32  BufferLen;

  ///
  /// Reserved, must be set to zero.
  ///
  PXE_UINT32  reserved;
} PXE_CPB_RECEIVE;

typedef struct s_pxe_db_receive {
  ///
  /// Source and destination MAC addresses from media header.
  ///
  PXE_MAC_ADDR        SrcAddr;
  PXE_MAC_ADDR        DestAddr;

  ///
  /// Length of received frame.  May be larger than receive buffer size.
  /// The receive buffer will not be overwritten.  This is how to tell
  /// if data was lost because the receive buffer was too small.
  ///
  PXE_UINT32          FrameLen;

  ///
  /// Protocol type from media header.
  ///
  PXE_MEDIA_PROTOCOL  Protocol;

  ///
  /// Length of media header in received frame.
  ///
  PXE_UINT16          MediaHeaderLen;

  ///
  /// Type of receive frame.
  ///
  PXE_FRAME_TYPE      Type;

  ///
  /// Reserved, must be zero.
  ///
  PXE_UINT8           reserved[7];

} PXE_DB_RECEIVE;

#pragma pack()

#endif