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| author | Yu Watanabe <watanabe.yu+github@gmail.com> | 2021-06-15 12:41:45 +0900 |
|---|---|---|
| committer | Yu Watanabe <watanabe.yu+github@gmail.com> | 2021-06-15 19:07:36 +0900 |
| commit | fc75007b3258d2d5a6d25f03116493f17c3b8db8 (patch) | |
| tree | 29545ac26833bb3f5ad72f550c81df37f8ff30be /src/basic/missing_syscalls.py | |
| parent | 18adce15665c865aa4e3a8f755b778cde18b5853 (diff) | |
| download | systemd-fc75007b3258d2d5a6d25f03116493f17c3b8db8.tar.gz | |
missing_syscall: add riscv32 support
Diffstat (limited to 'src/basic/missing_syscalls.py')
| -rw-r--r-- | src/basic/missing_syscalls.py | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/basic/missing_syscalls.py b/src/basic/missing_syscalls.py index d3c68dc067..19f9726d4e 100644 --- a/src/basic/missing_syscalls.py +++ b/src/basic/missing_syscalls.py @@ -73,8 +73,14 @@ DEF_TEMPLATE_B = '''\ # endif # elif defined(__powerpc__) # define systemd_NR_{syscall} {nr_powerpc} -# elif defined(__riscv) && defined(__LP64__) -# define systemd_NR_{syscall} {nr_riscv64} +# elif defined(__riscv) +# if __riscv_xlen == 32 +# define systemd_NR_{syscall} {nr_riscv32} +# elif __riscv_xlen == 64 +# define systemd_NR_{syscall} {nr_riscv64} +# else +# error "Unknown RISC-V ABI" +# endif # elif defined(__s390__) # define systemd_NR_{syscall} {nr_s390} # elif defined(__sparc__) |