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* Fix decoder handling of floor0 when the LSP order is 1.Tim Terriberry2010-10-151-4/+6
| | | | | | | | | | | | Header setup allows the LSP order to be as low as one, but the code in vorbis_lsp_to_curve() assumed it was at least two. This wasn't terrible in libvorbis... it would multiply a nonsense (but defined) value into the output, and nothing more. In Tremor, it referenced several completely undefined (stack) values, which could cause out-of-bounds lookup table accesses and crashes. git-svn-id: https://svn.xiph.org/trunk/Tremor@17538 0101bb08-14d6-0310-b084-bc0e0c8e3800
* Nicolas Pitre's LOW_ACCURACY patchMonty2002-10-161-18/+21
| | | | git-svn-id: https://svn.xiph.org/trunk/Tremor@4012 0101bb08-14d6-0310-b084-bc0e0c8e3800
* Latest improvements from Nicolas Pitre. Reviewed by MontyMonty2002-09-201-13/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | From Nicolas's notes: - Includes my previous patch with interpolation code for correct accuracy with all block sizes. - Interlaces sin and cos values in the lookup table to reduce register pressure since only one pointer is required to walk the table instead of two. This also accounts for better cache locality. - Split the lookup table into two tables since half of it (one value every two) is only used in separate section of the code and only with large block sizes. Therefore the table size used for the common case is reduced by 2 accounting for yet better cache usage. - Abstracted all cross products throughout the code so they can be easily optimized. First this prevents redundant register reloads on ARM due to the implicit memory access ordering, next this allowed for the opportunity to hook some inline assembly to perform the actual operation. - Fix layout of current assembly in asm_arm.h to match GCC's output (more enjoyable to read when inspecting the final assembly) plus some constraint correctness issues. - Added a memory barrier macro to force the compiler not to cache values into registers or on the stack in some cases. - Reordered some code for better ARM assembly generation by the compiler. git-svn-id: https://svn.xiph.org/trunk/Tremor@3923 0101bb08-14d6-0310-b084-bc0e0c8e3800
* Update headers on source files for BSD license.Monty2002-09-031-1/+4
| | | | git-svn-id: https://svn.xiph.org/trunk/Tremor@3895 0101bb08-14d6-0310-b084-bc0e0c8e3800
* Put root level of Tremor in CVSMonty2002-09-021-0/+178
git-svn-id: https://svn.xiph.org/trunk/Tremor@3890 0101bb08-14d6-0310-b084-bc0e0c8e3800