vpu: add tm2 support [1/1]

PD#SWPL-6397

Problem:
tm2 is a new chip

Solution:
add tm2 vpu driver support

Verify:
pxp

Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>

Conflicts:
	board/amlogic/configs/tl1_skt_v1.h

Change-Id: Ib730e538da79f8dea770140adac1bcd7b1bc9684

4 files changed, 95 insertions, 23 deletions

diff --git a/drivers/vpu/aml_vpu.c b/drivers/vpu/aml_vpu.c
index 779ea1b5c4..8bf9dfcc8e 100644
--- a/drivers/vpu/aml_vpu.c
+++ b/drivers/vpu/aml_vpu.c
@@ -60,6 +60,7 @@ static struct vpu_data_s vpu_data_gxb = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_gxb,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -78,6 +79,7 @@ static struct vpu_data_s vpu_data_gxtvbb = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_gxb,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -96,6 +98,7 @@ static struct vpu_data_s vpu_data_gxl = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_gxb,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -114,6 +117,7 @@ static struct vpu_data_s vpu_data_gxm = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_gxb,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -132,6 +136,7 @@ static struct vpu_data_s vpu_data_txl = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_gxb,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -150,6 +155,7 @@ static struct vpu_data_s vpu_data_txlx = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_gxb,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -168,6 +174,7 @@ static struct vpu_data_s vpu_data_axg = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_axg,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -186,6 +193,7 @@ static struct vpu_data_s vpu_data_txhd = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_txhd,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_txhd,
 
@@ -204,6 +212,7 @@ static struct vpu_data_s vpu_data_g12a = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_g12a,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -222,6 +231,7 @@ static struct vpu_data_s vpu_data_g12b = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_g12a,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_gx,
 
@@ -240,6 +250,7 @@ static struct vpu_data_s vpu_data_tl1 = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_tl1,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
 	.hdmi_iso_table = vpu_hdmi_iso_gxb,
 	.reset_table = vpu_reset_tl1,
 
@@ -247,7 +258,7 @@ static struct vpu_data_s vpu_data_tl1 = {
 	.module_init_table = NULL,
 };
 
-static struct vpu_data_s vpu_data_sm1 = {
+/* static struct vpu_data_s vpu_data_sm1 = {
 	.chip_type = VPU_CHIP_SM1,
 	.chip_name = "sm1",
 	.clk_level_dft = CLK_LEVEL_DFT_G12A,
@@ -258,6 +269,27 @@ static struct vpu_data_s vpu_data_sm1 = {
 	.vpu_clk_table = vpu_clk_table,
 
 	.mem_pd_table = vpu_mem_pd_tl1,
+	.hdmi_iso_pre_table = vpu_hdmi_iso_pre_gxb,
+	.hdmi_iso_table = vpu_hdmi_iso_sm1,
+	.reset_table = vpu_reset_gx,
+
+	.module_init_table_cnt = 0,
+	.module_init_table = NULL,
+};
+*/
+
+static struct vpu_data_s vpu_data_tm2 = {
+	.chip_type = VPU_CHIP_TM2,
+	.chip_name = "tm2",
+	.clk_level_dft = CLK_LEVEL_DFT_G12A,
+	.clk_level_max = CLK_LEVEL_MAX_G12A,
+	.gp_pll_valid = 0,
+
+	.fclk_div_table = fclk_div_table_g12a,
+	.vpu_clk_table = vpu_clk_table,
+
+	.mem_pd_table = vpu_mem_pd_tm2,
+	.hdmi_iso_pre_table = NULL,
 	.hdmi_iso_table = vpu_hdmi_iso_sm1,
 	.reset_table = vpu_reset_gx,
 
@@ -267,7 +299,6 @@ static struct vpu_data_s vpu_data_sm1 = {
 
 static void vpu_chip_detect(void)
 {
-#if 1
 	unsigned int cpu_type;
 
 	cpu_type = get_cpu_id().family_id;
@@ -305,16 +336,18 @@ static void vpu_chip_detect(void)
 	case MESON_CPU_MAJOR_ID_TL1:
 		vpu_conf.data = &vpu_data_tl1;
 		break;
-	case MESON_CPU_MAJOR_ID_SM1:
-		vpu_conf.data = &vpu_data_sm1;
-		break;
+	//case MESON_CPU_MAJOR_ID_SM1:
+	//	vpu_conf.data = &vpu_data_sm1;
+	//	break;
+	//case MESON_CPU_MAJOR_ID_TM2:
+	//	vpu_conf.data = &vpu_data_tm2;
+	//	break;
 	default:
-		vpu_conf.data = &vpu_data_sm1;
+		vpu_conf.data = &vpu_data_tm2;
 		break;
 	}
-#else
-	vpu_conf.data = &vpu_data_sm1;
-#endif
+
+	vpu_conf.data = &vpu_data_tm2;
 
 	strcpy(vpu_conf.drv_version, VPU_VERION);
 #ifdef CONFIG_VPU_CLK_LEVEL_DFT
@@ -354,6 +387,7 @@ static int vpu_check(void)
 	case VPU_CHIP_G12B:
 	case VPU_CHIP_TL1:
 	case VPU_CHIP_SM1:
+	case VPU_CHIP_TM2:
 		ret = 0;
 		break;
 	default:
diff --git a/drivers/vpu/aml_vpu.h b/drivers/vpu/aml_vpu.h
index 72111f7476..79529a1dfc 100644
--- a/drivers/vpu/aml_vpu.h
+++ b/drivers/vpu/aml_vpu.h
@@ -22,7 +22,7 @@
 #ifndef __VPU_PARA_H__
 #define __VPU_PARA_H__
 
-//#define VPU_DEBUG_PRINT
+#define VPU_DEBUG_PRINT
 #define VPUPR(fmt, args...)     printf("vpu: "fmt"", ## args)
 #define VPUERR(fmt, args...)    printf("vpu: error: "fmt"", ## args)
 
@@ -39,6 +39,7 @@ enum vpu_chip_e {
 	VPU_CHIP_G12B, /* 9 */
 	VPU_CHIP_TL1, /* 10 */
 	VPU_CHIP_SM1, /* 11 */
+	VPU_CHIP_TM2, /* 12 */
 	VPU_CHIP_MAX,
 };
 
@@ -84,6 +85,7 @@ struct vpu_data_s {
 	struct vpu_clk_s  *vpu_clk_table;
 
 	struct vpu_ctrl_s *mem_pd_table;
+	struct vpu_ctrl_s *hdmi_iso_pre_table;
 	struct vpu_ctrl_s *hdmi_iso_table;
 	struct vpu_reset_s *reset_table;
 
diff --git a/drivers/vpu/aml_vpu_ctrl.h b/drivers/vpu/aml_vpu_ctrl.h
index 0099bd6832..11137d7e85 100644
--- a/drivers/vpu/aml_vpu_ctrl.h
+++ b/drivers/vpu/aml_vpu_ctrl.h
@@ -162,18 +162,37 @@ static struct vpu_ctrl_s vpu_mem_pd_tl1[] = {
 	{VPU_REG_END,         0,   0,    0},
 };
 
+static struct vpu_ctrl_s vpu_mem_pd_tm2[] = {
+	/* reg,               val, bit, len */
+	{HHI_VPU_MEM_PD_REG0, 1,   0,   32},
+	{HHI_VPU_MEM_PD_REG1, 1,   0,   32},
+	{HHI_VPU_MEM_PD_REG2, 1,   0,   32},
+	{HHI_VPU_MEM_PD_REG3, 1,   0,   32},
+	{HHI_VPU_MEM_PD_REG4, 1,   0,    8},
+	{VPU_REG_END,         0,   0,    0},
+};
+
+/* ******************************************************* */
+/*              VPU_HDMI ISO pre: before reset               */
+/* ******************************************************* */
+static struct vpu_ctrl_s vpu_hdmi_iso_pre_gxb[] = {
+	/* reg,                val, bit, len */
+	{AO_RTI_GEN_PWR_SLEEP0,  0,   8,   1},
+	{VPU_REG_END,            0,   0,   0},
+};
+
 /* ******************************************************* */
 /*              VPU_HDMI ISO                */
 /* ******************************************************* */
 static struct vpu_ctrl_s vpu_hdmi_iso_gxb[] = {
 	/* reg,                val, bit, len */
-	{AO_RTI_GEN_PWR_SLEEP0,  1,   9,   1},
+	{AO_RTI_GEN_PWR_SLEEP0,  0,   9,   1},
 	{VPU_REG_END,            0,   0,   0},
 };
 
 static struct vpu_ctrl_s vpu_hdmi_iso_sm1[] = {
 	/* reg,                val, bit, len */
-	{AO_RTI_GEN_PWR_ISO0,    1,   8,   1},
+	{AO_RTI_GEN_PWR_ISO0,    0,   8,   1},
 	{VPU_REG_END,            0,   0,   0},
 };
 
diff --git a/drivers/vpu/aml_vpu_power_init.c b/drivers/vpu/aml_vpu_power_init.c
index 462bf52039..ca3ca593c3 100644
--- a/drivers/vpu/aml_vpu_power_init.c
+++ b/drivers/vpu/aml_vpu_power_init.c
@@ -69,7 +69,7 @@ void vpu_power_on(void)
 {
 	struct vpu_ctrl_s *ctrl_table;
 	struct vpu_reset_s *reset_table;
-	unsigned int _reg, _start, _end, _len, mask;
+	unsigned int _reg, _val, _start, _end, _len, mask;
 	int i = 0, j;
 
 	/* power up memories */
@@ -92,7 +92,21 @@ void vpu_power_on(void)
 	}
 	udelay(20);
 
-	vpu_ao_setb(AO_RTI_GEN_PWR_SLEEP0, 0, 8, 1); /* [8] power on */
+	/* power on VPU_HDMI ISO */
+	ctrl_table = vpu_conf.data->hdmi_iso_pre_table;
+	if (ctrl_table) {
+		i = 0;
+		while (i < VPU_HDMI_ISO_CNT_MAX) {
+			if (ctrl_table[i].reg == VPU_REG_END)
+				break;
+			_reg = ctrl_table[i].reg;
+			_val = ctrl_table[i].val;
+			_start = ctrl_table[i].bit;
+			_len = ctrl_table[i].len;
+			vpu_ao_setb(_reg, _val, _start, _len);
+			i++;
+		}
+	}
 	udelay(20);
 
 	/* Reset VIU + VENC */
@@ -122,15 +136,18 @@ void vpu_power_on(void)
 
 	/* Remove VPU_HDMI ISO */
 	ctrl_table = vpu_conf.data->hdmi_iso_table;
-	i = 0;
-	while (i < VPU_HDMI_ISO_CNT_MAX) {
-		if (ctrl_table[i].reg == VPU_REG_END)
-			break;
-		_reg = ctrl_table[i].reg;
-		_start = ctrl_table[i].bit;
-		_len = ctrl_table[i].len;
-		vpu_ao_setb(_reg, 0, _start, _len);
-		i++;
+	if (ctrl_table) {
+		i = 0;
+		while (i < VPU_HDMI_ISO_CNT_MAX) {
+			if (ctrl_table[i].reg == VPU_REG_END)
+				break;
+			_reg = ctrl_table[i].reg;
+			_val = ctrl_table[i].val;
+			_start = ctrl_table[i].bit;
+			_len = ctrl_table[i].len;
+			vpu_ao_setb(_reg, _val, _start, _len);
+			i++;
+		}
 	}
 
 	VPUPR("%s\n", __func__);