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| author | Nian Jing <nian.jing@amlogic.com> | 2019-04-10 15:19:25 +0800 |
|---|---|---|
| committer | Dongjin Kim <tobetter@gmail.com> | 2019-05-16 13:20:34 +0900 |
| commit | 4f19fa5a1e8dd29d7a1fa273426f8f9cc8855c02 (patch) | |
| tree | aeec01487d053f1a442bd1cfe5eeea81d864cc38 /drivers | |
| parent | 9c69ef3c0473c72382740293a6c6df0a4d1212ee (diff) | |
| download | u-boot-odroid-c1-4f19fa5a1e8dd29d7a1fa273426f8f9cc8855c02.tar.gz | |
cvbs: add bootloader support for sm1 [1/1]
PD#SWPL-6692
Problem:
cvbs no display after reboot
Solution:
add sm1 support on bootloader
Verify:
sm1
Change-Id: I74051f4c73bf64314261cb92548b9e4d66de139f
Signed-off-by: Nian Jing <nian.jing@amlogic.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/display/vout/cvbs.c | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/drivers/display/vout/cvbs.c b/drivers/display/vout/cvbs.c index e20bd4b184..de8ae6193e 100644 --- a/drivers/display/vout/cvbs.c +++ b/drivers/display/vout/cvbs.c @@ -78,6 +78,13 @@ static struct cvbs_vdac_data_s vdac_data_g12b = { .vdac_ctrl1_dis = 8, }; +static struct cvbs_vdac_data_s vdac_data_sm1 = { + .vdac_ctrl0_en = 0x906001, + .vdac_ctrl0_dis = 0, + .vdac_ctrl1_en = 0, + .vdac_ctrl1_dis = 8, +}; + static struct cvbs_vdac_data_s vdac_data_tl1 = { .vdac_ctrl0_en = 0x906001, .vdac_ctrl0_dis = 0, @@ -216,6 +223,12 @@ static inline bool is_meson_g12b_cpu(void) MESON_CPU_MAJOR_ID_G12B) ? 1 : 0; } +static inline bool is_meson_sm1_cpu(void) +{ + return (get_cpu_id().family_id == + MESON_CPU_MAJOR_ID_SM1) ? 1 : 0; +} + static inline bool is_meson_tl1_cpu(void) { return (get_cpu_id().family_id == @@ -472,6 +485,7 @@ int cvbs_reg_debug(int argc, char* const argv[]) value = simple_strtoul(argv[2], NULL, 0); if (check_cpu_type(MESON_CPU_MAJOR_ID_G12A) || check_cpu_type(MESON_CPU_MAJOR_ID_G12B) || + check_cpu_type(MESON_CPU_MAJOR_ID_SM1) || is_meson_tl1_cpu()) { if (value == 1 || value == 2 || value == 3 || value == 0) { @@ -723,7 +737,8 @@ static int cvbs_config_clock(void) else if (check_cpu_type(MESON_CPU_MAJOR_ID_GXTVBB)) cvbs_config_hdmipll_gxtvbb(); else if (check_cpu_type(MESON_CPU_MAJOR_ID_G12A) || - check_cpu_type(MESON_CPU_MAJOR_ID_G12B)) { + check_cpu_type(MESON_CPU_MAJOR_ID_G12B) || + check_cpu_type(MESON_CPU_MAJOR_ID_SM1)) { if (s_enci_clk_path & 0x1) cvbs_config_gp0pll_g12a(); else @@ -734,7 +749,8 @@ static int cvbs_config_clock(void) cvbs_config_hdmipll_gxl(); if (check_cpu_type(MESON_CPU_MAJOR_ID_G12A) || - check_cpu_type(MESON_CPU_MAJOR_ID_G12B)) { + check_cpu_type(MESON_CPU_MAJOR_ID_G12B) || + check_cpu_type(MESON_CPU_MAJOR_ID_SM1)) { if (s_enci_clk_path & 0x2) cvbs_set_vid1_clk(s_enci_clk_path & 0x1); else @@ -826,7 +842,9 @@ static void cvbs_performance_enhancement(int mode) index = (index >= max) ? 0 : index; s = tvregs_576cvbs_performance_gxtvbb[index]; type = 5; - } else if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) { + } else if (is_meson_g12a_cpu() || + is_meson_g12b_cpu() || + is_meson_sm1_cpu()) { max = sizeof(tvregs_576cvbs_performance_g12a) / sizeof(struct reg_s *); index = (index >= max) ? 0 : index; @@ -973,6 +991,9 @@ void vdac_data_config(void) case MESON_CPU_MAJOR_ID_G12B: cvbs_vdac_data = &vdac_data_g12b; break; + case MESON_CPU_MAJOR_ID_SM1: + cvbs_vdac_data = &vdac_data_sm1; + break; case MESON_CPU_MAJOR_ID_TL1: cvbs_vdac_data = &vdac_data_tl1; break; |