tl1: bringup: add define of MESON_CPU_MAJOR_ID_TL1 [1/1]

PD#172587

Problem:
no MESON_CPU_MAJOR_ID_TL1

Solution:
add define of MESON_CPU_MAJOR_ID_TL1

Verify:
test pass on pxp

Change-Id: Id4c846b6b47f03906329466058920bf1c8b79897
Signed-off-by: Zhongfu Luo <zhongfu.luo@amlogic.com>

tl1: bringup: support osd bootlogo [1/1]

PD#172587

Problem:
Can't show bootlogo

Solution:
add tl1 bootlogo support

Verify:
test pass on ptm

Change-Id: I1870b6ef46129e2f632663df45ee15f3cf47538e
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
Signed-off-by: Dongjin Kim <tobetter@gmail.com>

5 files changed, 56 insertions, 26 deletions

diff --git a/drivers/display/osd/osd.h b/drivers/display/osd/osd.h
index c8fb800df8..5655f9ae23 100644
--- a/drivers/display/osd/osd.h
+++ b/drivers/display/osd/osd.h
@@ -182,6 +182,13 @@ enum hw_reg_index_e {
 	HW_REG_INDEX_MAX
 };
 
+enum osd_ver_e {
+	OSD_SIMPLE = 0,
+	OSD_NORMAL,
+	OSD_HIGH_ONE,
+	OSD_HIGH_OTHER
+};
+
 struct pandata_s {
 	s32 x_start;
 	s32 x_end;
@@ -262,6 +269,7 @@ struct hw_para_s {
 	u32 angle[HW_OSD_COUNT];
 	u32 clone[HW_OSD_COUNT];
 	u32 bot_type;
+	u32 osd_ver;
 };
 
 #endif /* _OSD_H_ */
diff --git a/drivers/display/osd/osd_debug.c b/drivers/display/osd/osd_debug.c
index f8cfb9d350..e916e7a393 100644
--- a/drivers/display/osd/osd_debug.c
+++ b/drivers/display/osd/osd_debug.c
@@ -37,6 +37,8 @@
 
 #define msleep(a) mdelay(a)
 
+extern struct hw_para_s osd_hw;
+
 static void osd_debug_dump_value(void)
 {
 	u32 index = 0;
@@ -116,7 +118,7 @@ static void osd_debug_dump_register_all(void)
 	osd_logi("reg[0x%x]: 0x%08x\n", reg, osd_reg_read(reg));
 	reg = VPP_HOLD_LINES;
 	osd_logi("reg[0x%x]: 0x%08x\n", reg, osd_reg_read(reg));
-	if (get_cpu_id().family_id >= MESON_CPU_MAJOR_ID_G12A) {
+	if (osd_hw.osd_ver == OSD_HIGH_ONE) {
 #ifdef CONFIG_AML_MESON_G12A
 		reg = OSD_PATH_MISC_CTRL;
 		osd_logi("reg[0x%x]: 0x%08x\n", reg, osd_reg_read(reg));
@@ -242,7 +244,7 @@ static void osd_test_dummydata(void)
 	dummy_data = osd_reg_read(VPP_DUMMY_DATA1);
 	osd_reset();
 	osd_logi("--- OSD TEST DUMMYDATA ---\n");
-	if (get_cpu_id().family_id >= MESON_CPU_MAJOR_ID_G12A) {
+	if (osd_hw.osd_ver == OSD_HIGH_ONE) {
 #ifdef CONFIG_AML_MESON_G12A
 		osd_reg_write(VPP_POST_BLEND_BLEND_DUMMY_DATA, 0xff);
 		msleep(OSD_TEST_DURATION);
diff --git a/drivers/display/osd/osd_fb.c b/drivers/display/osd/osd_fb.c
index 1219ddb1b4..4ef0c2e033 100644
--- a/drivers/display/osd/osd_fb.c
+++ b/drivers/display/osd/osd_fb.c
@@ -164,6 +164,8 @@ static const struct color_bit_define_s default_color_format_array[] = {
 };
 
 GraphicDevice fb_gdev;
+struct hw_para_s osd_hw;
+
 typedef struct pic_info_t {
 	unsigned int mode;
 	unsigned int type;
@@ -361,6 +363,24 @@ unsigned long get_fb_addr(void)
 	return fb_addr;
 }
 
+static void get_osd_version(void)
+{
+	u32 family_id = get_cpu_id().family_id;
+
+	if (family_id == MESON_CPU_MAJOR_ID_AXG)
+		osd_hw.osd_ver = OSD_SIMPLE;
+	else if ((family_id < MESON_CPU_MAJOR_ID_G12A) ||
+			((family_id > MESON_CPU_MAJOR_ID_G12B) &&
+				(family_id < MESON_CPU_MAJOR_ID_TL1)))
+		osd_hw.osd_ver = OSD_NORMAL;
+	else if ((family_id == MESON_CPU_MAJOR_ID_G12A) ||
+			(family_id == MESON_CPU_MAJOR_ID_G12B) ||
+				(family_id == MESON_CPU_MAJOR_ID_TL1))
+		osd_hw.osd_ver = OSD_HIGH_ONE;
+	else
+		osd_hw.osd_ver = OSD_HIGH_OTHER;
+}
+
 int get_osd_layer(void)
 {
 	char *layer_str;
@@ -400,7 +420,7 @@ static void *osd_hw_init(void)
 	if (osd_index == OSD1)
 		osd_layer_init(&fb_gdev, OSD1);
 	else if (osd_index == OSD2) {
-		if (get_cpu_id().family_id == MESON_CPU_MAJOR_ID_AXG) {
+		if (osd_hw.osd_ver == OSD_SIMPLE) {
 			osd_loge("AXG not support osd2\n");
 			return NULL;
 		}
@@ -424,6 +444,8 @@ void *video_hw_init(int display_mode)
 	u32 fb_width = 0;
 	u32 fb_height = 0;;
 
+	get_osd_version();
+
 	vout_init();
 	fb_addr = get_fb_addr();
 	switch (display_mode) {
@@ -457,8 +479,6 @@ void *video_hw_init(int display_mode)
 	fb_gdev.bg = bg;
 	fb_gdev.mode = display_mode;
 	return osd_hw_init();
-
-
 }
 
 int rle8_decode(uchar *ptr, bmp_image_t *bmap_rle8, ulong width_bmp, ulong height_bmp) {
@@ -987,7 +1007,7 @@ int video_scale_bitmap(void)
 	disp_data.y_start = axis[1];
 	disp_data.x_end = axis[0] + axis[2] - 1;
 	disp_data.y_end = axis[1] + axis[3] - 1;
-	if (get_cpu_id().family_id >= MESON_CPU_MAJOR_ID_G12A)
+	if (osd_hw.osd_ver == OSD_HIGH_ONE)
 		osd_update_blend(&disp_data);
 #endif
 	osd_enable_hw(osd_index, 1);
@@ -1154,6 +1174,8 @@ static int _osd_hw_init(void)
 	u32 fb_width = 0;
 	u32 fb_height = 0;;
 
+	get_osd_version();
+
 	vout_init();
 	fb_addr = get_fb_addr();
 #ifdef CONFIG_OSD_SCALE_ENABLE
@@ -1194,7 +1216,7 @@ static int osd_hw_init_by_index(u32 osd_index)
 	if (osd_index == OSD1)
 		osd_layer_init(&fb_gdev, OSD1);
 	else if ( osd_index == OSD2) {
-		if (get_cpu_id().family_id == MESON_CPU_MAJOR_ID_AXG) {
+		if (osd_hw.osd_ver == OSD_SIMPLE) {
 			osd_loge("AXG not support osd2\n");
 			return -1;
 		}
@@ -1332,12 +1354,10 @@ int osd_rma_test(u32 osd_index)
 	u32 hist_result[4];
 	u32 family_id = get_cpu_id().family_id;
 
-	if (family_id == MESON_CPU_MAJOR_ID_AXG) {
+	if (osd_hw.osd_ver == OSD_SIMPLE) {
 		osd_max = 0;
-#ifdef CONFIG_AML_MESON_G12A
-	} else if (family_id >= MESON_CPU_MAJOR_ID_G12A) {
+	} else if (osd_hw.osd_ver == OSD_HIGH_ONE) {
 		osd_max = 1; // osd3 not supported now
-#endif
 	}
 	if (osd_index > osd_max) {
 		osd_loge("=== osd%d is not supported, osd_max is %d ===\n", osd_index, osd_max);
diff --git a/drivers/display/osd/osd_hw.c b/drivers/display/osd/osd_hw.c
index 33d2e020a1..d39e954249 100644
--- a/drivers/display/osd/osd_hw.c
+++ b/drivers/display/osd/osd_hw.c
@@ -858,7 +858,7 @@ void osd_setup_hw(u32 index,
 	int update_geometry = 0;
 	u32 w = (color->bpp * xres_virtual + 7) >> 3;
 
-	if (get_cpu_id().family_id == MESON_CPU_MAJOR_ID_AXG) {
+	if (osd_hw.osd_ver == OSD_SIMPLE) {
 		if (index == OSD2) {
 			osd_loge("AXG not support osd2\n");
 			return ;
@@ -910,7 +910,7 @@ void osd_setup_hw(u32 index,
 			 index, osd_hw.fb_gem[index].width);
 		osd_logd("osd[%d] canvas.height=%d\n",
 			 index, osd_hw.fb_gem[index].height);
-		if (get_cpu_id().family_id == MESON_CPU_MAJOR_ID_AXG) {
+		if (osd_hw.osd_ver == OSD_SIMPLE) {
 			u32 line_stride, fmt_mode, bpp;
 
 			bpp = color->bpp/8;
@@ -959,7 +959,7 @@ void osd_setup_hw(u32 index,
 		add_to_update_list(index, DISP_GEOMETRY);
 	add_to_update_list(index, DISP_OSD_REVERSE);
 #ifdef CONFIG_AML_MESON_G12A
-	if (get_cpu_id().family_id >= MESON_CPU_MAJOR_ID_G12A)
+	if (osd_hw.osd_ver == OSD_HIGH_ONE)
 		osd_setting_default_hwc(index, &disp_data);
 #endif
 	osd_wait_vsync_hw();
@@ -1959,17 +1959,17 @@ static void osd1_update_enable(void)
 
 	if (osd_hw.free_scale_mode[OSD1]) {
 		if (osd_hw.enable[OSD1] == ENABLE) {
-			if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A)
+			if (osd_hw.osd_ver <= OSD_NORMAL)
 			VSYNCOSD_SET_MPEG_REG_MASK(VPP_MISC,
 						   VPP_OSD1_POSTBLEND | VPP_POSTBLEND_EN);
 			VSYNCOSD_SET_MPEG_REG_MASK(VIU_OSD1_CTRL_STAT, 1 << 21);
 		} else {
 			VSYNCOSD_CLR_MPEG_REG_MASK(VIU_OSD1_CTRL_STAT, 1 << 21);
-			if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A)
+			if (osd_hw.osd_ver <= OSD_NORMAL)
 			VSYNCOSD_CLR_MPEG_REG_MASK(VPP_MISC,
 						   VPP_OSD1_POSTBLEND);
 		}
-	} else if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A){
+	} else if (osd_hw.osd_ver <= OSD_NORMAL) {
 		video_enable |= VSYNCOSD_RD_MPEG_REG(VPP_MISC)&VPP_VD1_PREBLEND;
 		if (osd_hw.enable[OSD1] == ENABLE) {
 			if (osd_hw.free_scale_enable[OSD1]) {
@@ -2007,7 +2007,7 @@ static void osd2_update_enable(void)
 	if (osd_hw.free_scale_mode[OSD2]) {
 		if (osd_hw.enable[OSD2] == ENABLE) {
 			if (osd_hw.free_scale_enable[OSD2]) {
-				if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A)
+				if (osd_hw.osd_ver <= OSD_NORMAL)
 				VSYNCOSD_SET_MPEG_REG_MASK(VPP_MISC,
 							   VPP_OSD1_POSTBLEND
 							   | VPP_POSTBLEND_EN);
@@ -2022,7 +2022,7 @@ static void osd2_update_enable(void)
 						VPP_OSD1_POSTBLEND);
 				*/
 #endif
-				if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A)
+				if (osd_hw.osd_ver <= OSD_NORMAL)
 				VSYNCOSD_SET_MPEG_REG_MASK(VPP_MISC,
 							   VPP_OSD2_POSTBLEND
 							   | VPP_POSTBLEND_EN);
@@ -2036,7 +2036,7 @@ static void osd2_update_enable(void)
 							   VPP_OSD1_POSTBLEND
 							   | VPP_OSD2_POSTBLEND);
 		}
-	} else if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A){
+	} else if (osd_hw.osd_ver <= OSD_NORMAL){
 		video_enable |= VSYNCOSD_RD_MPEG_REG(VPP_MISC)&VPP_VD1_PREBLEND;
 		if (osd_hw.enable[OSD2] == ENABLE) {
 			if (osd_hw.free_scale_enable[OSD2]) {
@@ -2633,7 +2633,7 @@ void osd_init_hw(void)
 		/* init vpu fifo control register */
 		data32 = osd_reg_read(VPP_OFIFO_SIZE);
 		osd_logi("VPP_OFIFO_SIZE:0x%x\n", data32);
-		if (get_cpu_id().family_id >= MESON_CPU_MAJOR_ID_G12A) {
+		if (osd_hw.osd_ver == OSD_HIGH_ONE) {
 			data32 = 0xfff << 20;
 			data32 |= (0xfff + 1);
 			osd_reg_write(VPP_OFIFO_SIZE, data32);
@@ -2645,14 +2645,14 @@ void osd_init_hw(void)
 		if ((get_cpu_id().family_id == MESON_CPU_MAJOR_ID_M6TV)
 		    || (get_cpu_id().family_id == MESON_CPU_MAJOR_ID_MTVD)) {
 			data32 |= 18 << 5;  /* hold_fifo_lines */
-		} else if (get_cpu_id().family_id == MESON_CPU_MAJOR_ID_AXG) {
+		} else if (osd_hw.osd_ver == OSD_SIMPLE) {
 			data32 &= ~(0x1f << 5); /* bit[9:5] HOLD_FIFO_LINES */
 			data32 |= 0x18 << 5;
 		} else {
 			data32 |= 4 << 5;  /* hold_fifo_lines */
 		}
 		/* burst_len_sel: 3=64 */
-		if (get_cpu_id().family_id >= MESON_CPU_MAJOR_ID_G12A) {
+		if (osd_hw.osd_ver == OSD_HIGH_ONE) {
 			data32 |= 1 << 10;
 			data32 |= 1 << 31;
 		} else
@@ -2682,7 +2682,7 @@ void osd_init_hw(void)
 		osd_reg_write(VIU_OSD2_FIFO_CTRL_STAT, data2);
 		osd_reg_set_mask(VPP_MISC, VPP_POSTBLEND_EN);
 		osd_reg_clr_mask(VPP_MISC, VPP_PREBLEND_EN);
-		if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A)
+		if (osd_hw.osd_ver <= OSD_NORMAL)
 			osd_reg_clr_mask(VPP_MISC,
 				VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND | VPP_VD1_POSTBLEND);
 		/* just disable osd to avoid booting hang up */
@@ -2702,7 +2702,7 @@ void osd_init_hw(void)
 		osd_reg_write(VIU_OSD1_CTRL_STAT2 , data32);
 		osd_reg_write(VIU_OSD2_CTRL_STAT2 , data32);
 	}
-	if (get_cpu_id().family_id != MESON_CPU_MAJOR_ID_G12A)
+	if (osd_hw.osd_ver <= OSD_NORMAL)
 		osd_reg_clr_mask(VPP_MISC, VPP_POST_FG_OSD2 | VPP_PRE_FG_OSD2);
 	osd_hw.order = OSD_ORDER_01;
 	osd_hw.enable[OSD2] = osd_hw.enable[OSD1] = DISABLE;
diff --git a/drivers/display/osd/osd_hw_def.h b/drivers/display/osd/osd_hw_def.h
index 4c55ca69ac..d18e071f1d 100644
--- a/drivers/display/osd/osd_hw_def.h
+++ b/drivers/display/osd/osd_hw_def.h
@@ -48,7 +48,7 @@ static void osd2_update_disp_osd_rotate(void);
 static void osd2_update_disp_scale_enable(void);
 static void osd2_update_disp_3d_mode(void);
 
-static struct hw_para_s osd_hw;
+extern struct hw_para_s osd_hw;
 static update_func_t hw_func_array[HW_OSD_COUNT][HW_REG_INDEX_MAX] = {
 	{
 		osd1_update_color_mode,