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authorYingyuan Zhu <yingyuan.zhu@amlogic.com>2019-03-14 11:09:23 +0800
committerDongjin Kim <tobetter@gmail.com>2019-05-16 13:20:03 +0900
commitd9915685bb72823f671ed36aa14e4e7a3e642fbc (patch)
tree2bacc381fab5158b07504098688dbc7e017650d4 /drivers
parent6e3c6760f8ae9ee51aaba15991f553b8c84d22ac (diff)
downloadu-boot-odroid-c1-d9915685bb72823f671ed36aa14e4e7a3e642fbc.tar.gz
jtag: add code to set up jtag pinmux [1/2]
PD#SWPL-5903 Problem: 1.bl30 sets the code of jtag pinmux to be platform-related, which is too messy and not conducive to later maintenance. 2.Jtag cannot be used in TXHD. Solution: Move the code to set up pinmux to bl33 for later maintenance, add code to set up jtag pinmux in TXHD. Verify: test pass on txhd-skt/g12a-u200/tl1-x309/txl-skt Change-Id: Ic25e04b8575b81cb6994d7a8d573d60ccdb7d23d Signed-off-by: Yingyuan Zhu <yingyuan.zhu@amlogic.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/Makefile3
-rw-r--r--drivers/jtag/Makefile12
-rw-r--r--drivers/jtag/jtag.c93
3 files changed, 107 insertions, 1 deletions
diff --git a/drivers/Makefile b/drivers/Makefile
index 4dbd563f93..f5cfa5a3e3 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -32,4 +32,5 @@ obj-y += display/
obj-$(CONFIG_SECURE_STORAGE) += securestorage/
obj-$(CONFIG_SECURE_STORAGE) += storagekey/
obj-$(CONFIG_CMD_SARADC) += adc/
-obj-$(CONFIG_CMD_IRBLASTER) += irblaster/ \ No newline at end of file
+obj-$(CONFIG_CMD_IRBLASTER) += irblaster/
+obj-$(CONFIG_CMD_JTAG) += jtag/ \ No newline at end of file
diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
new file mode 100644
index 0000000000..5e6fa0bb7c
--- /dev/null
+++ b/drivers/jtag/Makefile
@@ -0,0 +1,12 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2001
+# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_CMD_JTAG) += jtag.o
+
diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
new file mode 100644
index 0000000000..e5beb423f9
--- /dev/null
+++ b/drivers/jtag/jtag.c
@@ -0,0 +1,93 @@
+#include <common.h>
+#include <command.h>
+#include <asm/arch/io.h>
+#include <asm/arch/secure_apb.h>
+
+#define JTAG_M3_AO 0
+#define JTAG_M3_EE 1
+#define JTAG_AP_AO 2
+#define JTAG_AP_EE 3
+#define JTAG_M4_AO 8
+#define JTAG_M4_EE 9
+
+#define REG_END (volatile uint32_t *)-1
+struct jtag_pinctrl_data {
+ volatile uint32_t** ao_reg;
+ uint32_t* ao_value;
+ volatile uint32_t** ee_reg;
+ uint32_t* ee_value;
+ uint32_t value_save[2]; /*reg save backup*/
+};
+
+/* axg */
+#if defined(CONFIG_AML_MESON_AXG)
+
+ volatile static uint32_t* ao_reg[] = {P_AO_RTI_PINMUX_REG0, REG_END};
+ static uint32_t ao_value[] = {(0x4<<12) | (0x4<<16) | (0x4<<20) | (0x4<<28)};
+ volatile static uint32_t* ee_reg[] = {P_PERIPHS_PIN_MUX_4, REG_END};
+ static uint32_t ee_value[] = {(0x2<<0) | (0x2<<4) | (0x2<<16) | (0x2<<20)};
+
+/* g12a/g12b/tl1 */
+#elif defined(CONFIG_AML_MESON_G12A) || defined(CONFIG_AML_MESON_G12B) || defined(CONFIG_AML_MESON_TL1)
+
+ volatile static uint32_t* ao_reg[] = {P_AO_RTI_PINMUX_REG0, P_AO_RTI_PINMUX_REG1, REG_END};
+ static uint32_t ao_value[] = {(1 << 24) | (1 << 28), (1 << 4) | (1 << 0)};
+ volatile static uint32_t* ee_reg[] = {P_PERIPHS_PIN_MUX_9, REG_END};
+ static uint32_t ee_value[] = {(2 << 0) | (2 << 4) | (2 << 16) | (2 << 20)};
+
+/* txhd */
+#elif defined(CONFIG_AML_MESON_TXHD)
+
+ volatile static uint32_t* ao_reg[] = {P_AO_RTI_PIN_MUX_REG, REG_END};
+ static uint32_t ao_value[] = {(3 << 12) | (4 << 16) | (4 << 20) | (3 << 28)};
+ volatile static uint32_t* ee_reg[] = {P_PERIPHS_PIN_MUX_9, REG_END};
+ static uint32_t ee_value[] = {(2 << 0) | (2 << 4) | (2 << 16) | (2 << 20)};
+
+/* axg before */
+#else
+
+ volatile static uint32_t* ao_reg[] = {REG_END};
+ static uint32_t ao_value[] = {0};
+ volatile static uint32_t* ee_reg[] = {REG_END};
+ static uint32_t ee_value[] = {0};
+
+#endif
+
+/* set pinmux common code */
+static int enabled_flag = 0;
+static struct jtag_pinctrl_data jtag_pinctrl = {
+ .ao_reg = ao_reg,
+ .ao_value = ao_value,
+ .ee_reg = ee_reg,
+ .ee_value = ee_value,
+};
+
+static void jtag_set_regs(uint32_t* value, volatile uint32_t** reg)
+{
+ int i;
+
+ for (i = 0; reg[i] != REG_END; i++) {
+ if (!enabled_flag)
+ jtag_pinctrl.value_save[i] = readl(reg[i]);
+ writel(readl(reg[i]) | value[i], reg[i]);
+ }
+}
+
+void jtag_set_pinmux(unsigned int jtag_sel, int enable)
+{
+ if (enable) {
+ if (jtag_sel == JTAG_AP_AO || jtag_sel == JTAG_M3_AO || jtag_sel == JTAG_M4_AO)
+ jtag_set_regs(jtag_pinctrl.ao_value, jtag_pinctrl.ao_reg);
+ else
+ jtag_set_regs(jtag_pinctrl.ee_value, jtag_pinctrl.ee_reg);
+ enabled_flag = 1;
+ } else {
+ if (enabled_flag == 0)
+ return;
+ if (jtag_sel == JTAG_AP_AO || jtag_sel == JTAG_M3_AO || jtag_sel == JTAG_M4_AO)
+ jtag_set_regs(jtag_pinctrl.value_save, jtag_pinctrl.ao_reg);
+ else
+ jtag_set_regs(jtag_pinctrl.value_save, jtag_pinctrl.ee_reg);
+ enabled_flag = 0;
+ }
+}