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| author | Chin Liang See <clsee@altera.com> | 2015-08-26 14:28:56 +0800 |
|---|---|---|
| committer | Chin Liang See <clsee@altera.com> | 2015-08-26 14:28:56 +0800 |
| commit | 4003f38429d308c48773897a1ccf166486b9dd7f (patch) | |
| tree | 87a5ba7b85ebc24a4a44421426ce4b211f52ce11 | |
| parent | 5416e4aa6bffc357d39a72829e33559ed6e6c049 (diff) | |
| download | u-boot-socfpga-ACDS15.1.1_REL_GSRD_RC4.tar.gz | |
FogBugz #297183: Enabling ECC overwrite when SDRAM ECC is enabledrel_socfpga_v2013.01.01_15.11.02_prrel_socfpga_v2013.01.01_15.11.01_prrel_socfpga_v2013.01.01_15.10.02_prrel_socfpga_v2013.01.01_15.10.01_prrel_socfpga_v2013.01.01_15.09.02_prACDS15.1.1_REL_GSRD_RC6ACDS15.1.1_REL_GSRD_RC5ACDS15.1.1_REL_GSRD_RC4ACDS15.1.1_REL_GSRD_RC3ACDS15.1.1_REL_GSRD_RC2ACDS15.1.1_REL_GSRD_RC10ACDS15.1.1_REL_GSRD_RC1ACDS15.1.1_REL_GSRD_PR
Enable SDRAM ECC overwrite where it occurs when a correctable ECC
error is seen. A new read/modify/write to be scheduled for that
location to clear the ECC error.
Signed-off-by: Chin Liang See <clsee@altera.com>
| -rw-r--r-- | arch/arm/cpu/armv7/socfpga/sdram.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/sdram.c b/arch/arm/cpu/armv7/socfpga/sdram.c index 008276519c..f891f1c694 100644 --- a/arch/arm/cpu/armv7/socfpga/sdram.c +++ b/arch/arm/cpu/armv7/socfpga/sdram.c @@ -530,6 +530,12 @@ defined(CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS) SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB, SDR_CTRLGRP_CTRLCFG_NODMPINS_MASK); #endif +#if (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN == 1) + /* Enable ECC overwrites if ECC is enabled */ + reg_value = sdram_write_register_field(reg_value, 0x1, + SDR_CTRLGRP_CTRLCFG_CFG_ENABLE_ECC_CODE_OVERWRITES_LSB, + SDR_CTRLGRP_CTRLCFG_CFG_ENABLE_ECC_CODE_OVERWRITES_MASK); +#endif if (sdram_write_verify(register_offset, reg_value) == 1) { status = 1; COMPARE_FAIL_ACTION |