diff options
| author | Chin Liang See <clsee@altera.com> | 2015-07-21 21:21:01 +0800 |
|---|---|---|
| committer | Chin Liang See <clsee@altera.com> | 2015-07-21 21:21:01 +0800 |
| commit | 694539485a24e17a916b62aba898413c05cde04e (patch) | |
| tree | d4ae6589fcacfac3c225e1742a760ec64be2fe07 | |
| parent | 1de54d4b8d9f12bb8fe86a30b9a11ab06b8b50c4 (diff) | |
| download | u-boot-socfpga-rel_socfpga_v2014.10_arria10_bringup_15.08.01_pr.tar.gz | |
FogBugz #308130-1: dts: Enabling alteragrp.mpuclk in handoffrel_socfpga_v2014.10_arria10_bringup_15.08.01_pr
Support new handoff value for clock alteragrp.mpuclk.
Qsys tool is configuring this value instead of static
default value of divide by 2.
Signed-off-by: Chin Liang See <clsee@altera.com>
| -rw-r--r-- | arch/arm/dts/socfpga_arria10.dts | 1 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_arria10_dedicated_uart.dts | 1 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_arria10_qspi.dts | 1 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_arria10_qspi_dedicated_uart.dts | 1 |
4 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_arria10.dts b/arch/arm/dts/socfpga_arria10.dts index f868441e1c..39a1ac01cb 100644 --- a/arch/arm/dts/socfpga_arria10.dts +++ b/arch/arm/dts/socfpga_arria10.dts @@ -115,6 +115,7 @@ /* Address Block: soc_clock_manager_OCP_SLV.i_clk_mgr_alteragrp */ alteragrp { nocclk = <0x03840005>; /* Register: nocclk */ + mpuclk = <0x10001>; }; }; diff --git a/arch/arm/dts/socfpga_arria10_dedicated_uart.dts b/arch/arm/dts/socfpga_arria10_dedicated_uart.dts index 7ca1054e0b..d834f970f5 100644 --- a/arch/arm/dts/socfpga_arria10_dedicated_uart.dts +++ b/arch/arm/dts/socfpga_arria10_dedicated_uart.dts @@ -218,6 +218,7 @@ }; alteragrp { nocclk = <0x50005>; + mpuclk = <0x10001>; }; }; diff --git a/arch/arm/dts/socfpga_arria10_qspi.dts b/arch/arm/dts/socfpga_arria10_qspi.dts index 47263e755e..572fbb059c 100644 --- a/arch/arm/dts/socfpga_arria10_qspi.dts +++ b/arch/arm/dts/socfpga_arria10_qspi.dts @@ -115,6 +115,7 @@ /* Address Block: soc_clock_manager_OCP_SLV.i_clk_mgr_alteragrp */ alteragrp { nocclk = <0x00030005>; /* Register: nocclk */ + mpuclk = <0x10001>; }; }; diff --git a/arch/arm/dts/socfpga_arria10_qspi_dedicated_uart.dts b/arch/arm/dts/socfpga_arria10_qspi_dedicated_uart.dts index 23065c79d6..2e98b0c574 100644 --- a/arch/arm/dts/socfpga_arria10_qspi_dedicated_uart.dts +++ b/arch/arm/dts/socfpga_arria10_qspi_dedicated_uart.dts @@ -211,6 +211,7 @@ alteragrp { nocclk = <0x50005>; + mpuclk = <0x10001>; }; }; |