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authorYau Wai Gan <yau.wai.gan@intel.com>2021-02-03 19:20:17 +0800
committerYau Wai Gan <yau.wai.gan@intel.com>2021-02-03 19:20:17 +0800
commit17f7b08e09f3a2f73ca1e359e5fc13186e18dcbe (patch)
tree5989935ff873dd389c7cedbe8c866138d9255e27
parent7309360c6a3827aceb905516cbe76a5271b73ca5 (diff)
downloadu-boot-socfpga-17f7b08e09f3a2f73ca1e359e5fc13186e18dcbe.tar.gz
configs: socfpga: cyclone5: Disable SPL MMC in QSPI boot
Disable the MMC support in SPL for QSPI defconfig. This is to optimize the SPL code size to fit into OCRAM. QSPI boot does not require MMC drivers support in SPL. Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
-rw-r--r--configs/socfpga_cyclone5_qspi_defconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/socfpga_cyclone5_qspi_defconfig b/configs/socfpga_cyclone5_qspi_defconfig
index 6ed4dcff25..159758e828 100644
--- a/configs/socfpga_cyclone5_qspi_defconfig
+++ b/configs/socfpga_cyclone5_qspi_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
+# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_ENV_OFFSET_REDUND=0x210000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"