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authorChin Liang See <clsee@altera.com>2013-08-08 14:34:06 -0700
committerTien Hock Loh <thloh@altera.com>2013-08-15 15:15:12 +0800
commit58a278daa4f32c8e75a05d17cac5c4fa42e55895 (patch)
tree148e4f9506bf55eaa1219170925e9e2d2071496a
parent5adc5917f1125e68b7e62489794870ba818f8f83 (diff)
downloadu-boot-socfpga-58a278daa4f32c8e75a05d17cac5c4fa42e55895.tar.gz
FogBugz #144590: Fixing the broken Preloader's execute on FPGA
This patch will leave the bridge open if Preloader run on FPGA. At same time, this patch also fix the data section copying code. It will avoid the infinite copying loop as it should compared against target end address instead source end address Signed-off-by: Chin Liang See <clsee@altera.com> --- Changes for v3 - updated the commit message Changes for v2 - added details about copying code fix to commit message
-rw-r--r--arch/arm/cpu/armv7/socfpga/lowlevel_init.S2
-rw-r--r--arch/arm/cpu/armv7/socfpga/s_init.c5
2 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
index 811a39fce1..3f11fdf31e 100644
--- a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
@@ -61,7 +61,7 @@ save_boot_params:
relocate_loop:
ldmia r0!, {r3} /* copy from source address [r0] */
stmia r1!, {r3} /* copy to target address [r1] */
- cmp r0, r2 /* until source end addreee [r2] */
+ cmp r1, r2 /* until target end addreee [r2] */
blo relocate_loop
#endif /* CONFIG_PRELOADER_EXE_ON_FPGA */
#endif /* CONFIG_SPL_BUILD */
diff --git a/arch/arm/cpu/armv7/socfpga/s_init.c b/arch/arm/cpu/armv7/socfpga/s_init.c
index 0ae38dab6e..055711ad59 100644
--- a/arch/arm/cpu/armv7/socfpga/s_init.c
+++ b/arch/arm/cpu/armv7/socfpga/s_init.c
@@ -48,7 +48,12 @@ void s_init(void)
* SPL : configure the remap (L3 NIC-301 GPV) so the on-chip RAM at
* lower memory instead ROM.
*/
+#if (CONFIG_PRELOADER_EXE_ON_FPGA == 1)
+ /* if we run from FPGA, ensure we don't shutdown the bridge */
+ writel(0x9, SOCFPGA_L3REGS_ADDRESS);
+#else
writel(0x1, SOCFPGA_L3REGS_ADDRESS);
+#endif /* CONFIG_PRELOADER_EXE_ON_FPGA */
#else
/*
* U-Boot : configure the remap (L3 NIC-301 GPV)