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| author | Chin Liang See <chin.liang.see@intel.com> | 2017-09-15 22:02:54 +0800 |
|---|---|---|
| committer | Chin Liang See <chin.liang.see@intel.com> | 2017-09-18 16:10:32 +0800 |
| commit | fe252c8c0719fd4b2960385b7123de3213a86ec6 (patch) | |
| tree | 2f0d8a8f0b3a2a597e6ec83dfff6de7291be435e | |
| parent | be9c494f97df4c7c1cd49769a56719e70fe2ef41 (diff) | |
| download | u-boot-socfpga-fe252c8c0719fd4b2960385b7123de3213a86ec6.tar.gz | |
arm64: Ensure relocated spin table address is updated back to SPL
When SPL is used as EL3, SPL will trap other processors than CPU0
into spin loop. When U-Boot updated the spin table address after
U-Boot relocate, we want to ensure the CPU_RELEASE_ADDR is updated.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
| -rw-r--r-- | arch/arm/cpu/armv8/spin_table.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c index ec1c9b8ddb..a7278135b1 100644 --- a/arch/arm/cpu/armv8/spin_table.c +++ b/arch/arm/cpu/armv8/spin_table.c @@ -8,6 +8,7 @@ #include <common.h> #include <libfdt.h> #include <asm/spin_table.h> +#include <asm/io.h> int spin_table_update_dt(void *fdt) { @@ -56,6 +57,9 @@ int spin_table_update_dt(void *fdt) if (ret) return -ENOSPC; + /* update the spin loop table start address to cpu_release_addr */ + writeq(rsv_addr, CPU_RELEASE_ADDR); + printf(" Reserved memory region for spin-table: addr=%lx size=%lx\n", rsv_addr, rsv_size); |