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Diffstat (limited to 'arch/arm/cpu/armv7/socfpga')
-rw-r--r--arch/arm/cpu/armv7/socfpga/lowlevel_init.S2
-rw-r--r--arch/arm/cpu/armv7/socfpga/s_init.c5
2 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
index 811a39fce1..3f11fdf31e 100644
--- a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
@@ -61,7 +61,7 @@ save_boot_params:
relocate_loop:
ldmia r0!, {r3} /* copy from source address [r0] */
stmia r1!, {r3} /* copy to target address [r1] */
- cmp r0, r2 /* until source end addreee [r2] */
+ cmp r1, r2 /* until target end addreee [r2] */
blo relocate_loop
#endif /* CONFIG_PRELOADER_EXE_ON_FPGA */
#endif /* CONFIG_SPL_BUILD */
diff --git a/arch/arm/cpu/armv7/socfpga/s_init.c b/arch/arm/cpu/armv7/socfpga/s_init.c
index 0ae38dab6e..055711ad59 100644
--- a/arch/arm/cpu/armv7/socfpga/s_init.c
+++ b/arch/arm/cpu/armv7/socfpga/s_init.c
@@ -48,7 +48,12 @@ void s_init(void)
* SPL : configure the remap (L3 NIC-301 GPV) so the on-chip RAM at
* lower memory instead ROM.
*/
+#if (CONFIG_PRELOADER_EXE_ON_FPGA == 1)
+ /* if we run from FPGA, ensure we don't shutdown the bridge */
+ writel(0x9, SOCFPGA_L3REGS_ADDRESS);
+#else
writel(0x1, SOCFPGA_L3REGS_ADDRESS);
+#endif /* CONFIG_PRELOADER_EXE_ON_FPGA */
#else
/*
* U-Boot : configure the remap (L3 NIC-301 GPV)