Minor coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>

10 files changed, 48 insertions, 67 deletions

diff --git a/README b/README
index 0886987a60..a43da97a41 100644
--- a/README
+++ b/README
@@ -1177,7 +1177,7 @@ The following options need to be configured:
 		or CONFIG_VIDEO_SED13806_16BPP
 
 		CONFIG_FSL_DIU_FB
-		Enable the Freescale DIU video driver.  Reference boards for
+		Enable the Freescale DIU video driver.	Reference boards for
 		SOCs that have a DIU should define this macro to enable DIU
 		support, and should also define these other macros:
 
@@ -2289,44 +2289,44 @@ FIT uImage format:
 		kernel. Needed for UBI support.
 
 - SPL framework
-                CONFIG_SPL
-                Enable building of SPL globally.
+		CONFIG_SPL
+		Enable building of SPL globally.
 
-                CONFIG_SPL_TEXT_BASE
-                TEXT_BASE for linking the SPL binary.
+		CONFIG_SPL_TEXT_BASE
+		TEXT_BASE for linking the SPL binary.
 
-                CONFIG_SPL_LDSCRIPT
-                LDSCRIPT for linking the SPL binary.
+		CONFIG_SPL_LDSCRIPT
+		LDSCRIPT for linking the SPL binary.
 
-                CONFIG_SPL_LIBCOMMON_SUPPORT
-                Support for common/libcommon.o in SPL binary
+		CONFIG_SPL_LIBCOMMON_SUPPORT
+		Support for common/libcommon.o in SPL binary
 
-                CONFIG_SPL_LIBDISK_SUPPORT
-                Support for disk/libdisk.o in SPL binary
+		CONFIG_SPL_LIBDISK_SUPPORT
+		Support for disk/libdisk.o in SPL binary
 
-                CONFIG_SPL_I2C_SUPPORT
-                Support for drivers/i2c/libi2c.o in SPL binary
+		CONFIG_SPL_I2C_SUPPORT
+		Support for drivers/i2c/libi2c.o in SPL binary
 
-                CONFIG_SPL_GPIO_SUPPORT
-                Support for drivers/gpio/libgpio.o in SPL binary
+		CONFIG_SPL_GPIO_SUPPORT
+		Support for drivers/gpio/libgpio.o in SPL binary
 
-                CONFIG_SPL_MMC_SUPPORT
-                Support for drivers/mmc/libmmc.o in SPL binary
+		CONFIG_SPL_MMC_SUPPORT
+		Support for drivers/mmc/libmmc.o in SPL binary
 
-                CONFIG_SPL_SERIAL_SUPPORT
-                Support for drivers/serial/libserial.o in SPL binary
+		CONFIG_SPL_SERIAL_SUPPORT
+		Support for drivers/serial/libserial.o in SPL binary
 
-                CONFIG_SPL_SPI_FLASH_SUPPORT
-                Support for drivers/mtd/spi/libspi_flash.o in SPL binary
+		CONFIG_SPL_SPI_FLASH_SUPPORT
+		Support for drivers/mtd/spi/libspi_flash.o in SPL binary
 
-                CONFIG_SPL_SPI_SUPPORT
-                Support for drivers/spi/libspi.o in SPL binary
+		CONFIG_SPL_SPI_SUPPORT
+		Support for drivers/spi/libspi.o in SPL binary
 
-                CONFIG_SPL_FAT_SUPPORT
-                Support for fs/fat/libfat.o in SPL binary
+		CONFIG_SPL_FAT_SUPPORT
+		Support for fs/fat/libfat.o in SPL binary
 
-                CONFIG_SPL_LIBGENERIC_SUPPORT
-                Support for lib/libgeneric.o in SPL binary
+		CONFIG_SPL_LIBGENERIC_SUPPORT
+		Support for lib/libgeneric.o in SPL binary
 
 Modem Support:
 --------------
diff --git a/arch/arm/cpu/arm920t/at91/at91rm9200_devices.c b/arch/arm/cpu/arm920t/at91/at91rm9200_devices.c
index f610a1e562..412f502c36 100644
--- a/arch/arm/cpu/arm920t/at91/at91rm9200_devices.c
+++ b/arch/arm/cpu/arm920t/at91/at91rm9200_devices.c
@@ -75,11 +75,9 @@ void at91_serial2_hw_init(void)
 	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
 }
 
-
 void at91_seriald_hw_init(void)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 30, PUP);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 31, 1);		/* DTXD */
 	/* writing SYS to PCER has no effect on AT91RM9200 */
 }
-
diff --git a/arch/arm/cpu/arm920t/at91/clock.c b/arch/arm/cpu/arm920t/at91/clock.c
index 02318b33f5..09d2799831 100644
--- a/arch/arm/cpu/arm920t/at91/clock.c
+++ b/arch/arm/cpu/arm920t/at91/clock.c
@@ -104,7 +104,6 @@ static u32 at91_pll_rate(u32 freq, u32 reg)
 	return freq;
 }
 
-
 int at91_clock_init(unsigned long main_clock)
 {
 	unsigned freq, mckr;
@@ -157,4 +156,3 @@ int at91_clock_init(unsigned long main_clock)
 
 	return 0;
 }
-
diff --git a/arch/arm/cpu/arm920t/at91/cpu.c b/arch/arm/cpu/arm920t/at91/cpu.c
index 74a11585bc..46aae6f489 100644
--- a/arch/arm/cpu/arm920t/at91/cpu.c
+++ b/arch/arm/cpu/arm920t/at91/cpu.c
@@ -40,4 +40,3 @@ int arch_cpu_init(void)
 {
 	return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
 }
-
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19fb7b..30624a50f0 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -34,7 +34,7 @@ endif
 COBJS-$(CONFIG_SPL_BUILD) += foo.o
 
 #ifdef CONFIG_SPL_BUILD
-        foo();
+	foo();
 #endif
 
 
diff --git a/doc/README.at91-soc b/doc/README.at91-soc
index ed6e76a389..bed035c88d 100644
--- a/doc/README.at91-soc
+++ b/doc/README.at91-soc
@@ -39,4 +39,3 @@ The method for updating
 3. add new structures for SoC access
 4. Convert arch, driver and boards file to new SoC
 5. remove legacy code, if all boards and drives are ready
-
diff --git a/doc/README.ublimage b/doc/README.ublimage
index add24d649b..ab25b2615e 100644
--- a/doc/README.ublimage
+++ b/doc/README.ublimage
@@ -101,22 +101,22 @@ This steps are done automagically if you do a "make all"
 Structure of this binary (Example for the cam_enc_4xx board with a NAND
 page size = 0x800):
 
-offset :    0x00000 | 0x800       | 0x3800
-content:    UBL     | nand_spl    | u-boot code
-            Header  | code        |
+offset :    0x00000 | 0x800	  | 0x3800
+content:    UBL     | nand_spl	  | u-boot code
+	    Header  | code	  |
 
 The NAND layout looks for example like this:
 
 (Example for the cam_enc_4xx board with a NAND page size = 0x800, block
 size = 0x20000 and CONFIG_SYS_NROF_UBL_HEADER 5):
 
-offset :    0x80000 | 0xa0000     | 0xa3000
-content:    UBL     | nand_spl    | u-boot code
-            Header  | code        |
-            ^         ^
-	    ^         0xa0000 = CONFIG_SYS_NROF_UBL_HEADER * 0x20000
-            ^
-            0x80000 = Block 4 * 0x20000
+offset :    0x80000 | 0xa0000	  | 0xa3000
+content:    UBL     | nand_spl	  | u-boot code
+	    Header  | code	  |
+	    ^	      ^
+	    ^	      0xa0000 = CONFIG_SYS_NROF_UBL_HEADER * 0x20000
+	    ^
+	    0x80000 = Block 4 * 0x20000
 
 If the cpu starts in NAND boot mode, it checks the UBL descriptor
 starting with block 1 (page 0).  When a valid UBL signature is found,
@@ -132,7 +132,7 @@ read and processed.
 
 Once the user-specified start-up conditions are set, the RBL copies the
 nand_spl into ARM internal RAM, starting at address 0x0000: 0020.
-                                                            ^^^^
+							    ^^^^
 
 The nand_spl code itself now does necessary intializations, and at least,
 copies the u-boot code from NAND into RAM, and jumps to it ...
diff --git a/doc/README.usb b/doc/README.usb
index a8a4058de1..0771c71a85 100644
--- a/doc/README.usb
+++ b/doc/README.usb
@@ -116,7 +116,7 @@ Bus 002 Device 010: ID 0b95:7720 ASIX Electronics Corp. AX88772
 If you look at drivers/usb/eth/asix.c you will see this line within the
 supported device list, so we know this adapter is supported.
 
-        { 0x0b95, 0x7720 },     /* Trendnet TU2-ET100 V3.0R */
+	{ 0x0b95, 0x7720 },	/* Trendnet TU2-ET100 V3.0R */
 
 If your adapter is not listed there is a still a chance that it will
 work. Try looking up the manufacturer of the chip inside your adapter.
@@ -144,8 +144,8 @@ To enable USB Host Ethernet in U-Boot, your platform must of course
 support USB with CONFIG_CMD_USB enabled and working. You will need to
 add some config settings to your board header file:
 
-#define CONFIG_USB_HOST_ETHER   /* Enable USB Ethernet adapters */
-#define CONFIG_USB_ETHER_ASIX   /* Asix, or whatever driver(s) you want */
+#define CONFIG_USB_HOST_ETHER	/* Enable USB Ethernet adapters */
+#define CONFIG_USB_ETHER_ASIX	/* Asix, or whatever driver(s) you want */
 
 As with built-in networking, you will also want to enable some network
 commands, for example:
@@ -168,9 +168,9 @@ You can also set the default IP address of your board and the server
 as well as the default file to load when a 'bootp' command is issued.
 All of these can be obtained from the bootp server if not set.
 
-#define CONFIG_IPADDR           10.0.0.2  (replace with your value)
-#define CONFIG_SERVERIP         10.0.0.1  (replace with your value)
-#define CONFIG_BOOTFILE         uImage
+#define CONFIG_IPADDR		10.0.0.2  (replace with your value)
+#define CONFIG_SERVERIP		10.0.0.1  (replace with your value)
+#define CONFIG_BOOTFILE		uImage
 
 
 The 'usb start' command should identify the adapter something like this:
@@ -200,9 +200,9 @@ TFTP from server 172.22.72.144; our IP address is 172.22.73.81
 Filename '/tftpboot/uImage-sjg-seaboard-261347'.
 Load address: 0x40c000
 Loading: #################################################################
-         #################################################################
-         #################################################################
-         ################################################
+	 #################################################################
+	 #################################################################
+	 ################################################
 done
 Bytes transferred = 3557464 (364858 hex)
 CrOS>
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 03082231e9..7a1561429d 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -27,13 +27,11 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/davinci_misc.h>
 
-
 static struct gpio_registry {
 	int is_registered;
 	char name[GPIO_NAME_SIZE];
 } gpio_registry[MAX_NUM_GPIOS];
 
-
 #define pinmux(x)       (&davinci_syscfg_regs->pinmux[x])
 
 static const struct pinmux_config gpio_pinmux[] = {
@@ -183,8 +181,6 @@ static const struct pinmux_config gpio_pinmux[] = {
 	{ pinmux(18), 8, 2 },
 };
 
-
-
 int gpio_request(int gp, const char *label)
 {
 	if (gp >= MAX_NUM_GPIOS)
@@ -202,13 +198,11 @@ int gpio_request(int gp, const char *label)
 	return 0;
 }
 
-
 void gpio_free(int gp)
 {
 	gpio_registry[gp].is_registered = 0;
 }
 
-
 void gpio_toggle_value(int gp)
 {
 	struct davinci_gpio *bank;
@@ -217,7 +211,6 @@ void gpio_toggle_value(int gp)
 	gpio_set_value(gp, !gpio_get_value(gp));
 }
 
-
 int gpio_direction_input(int gp)
 {
 	struct davinci_gpio *bank;
@@ -227,7 +220,6 @@ int gpio_direction_input(int gp)
 	return 0;
 }
 
-
 int gpio_direction_output(int gp, int value)
 {
 	struct davinci_gpio *bank;
@@ -238,7 +230,6 @@ int gpio_direction_output(int gp, int value)
 	return 0;
 }
 
-
 int gpio_get_value(int gp)
 {
 	struct davinci_gpio *bank;
@@ -249,7 +240,6 @@ int gpio_get_value(int gp)
 	return ip ? 1 : 0;
 }
 
-
 void gpio_set_value(int gp, int value)
 {
 	struct davinci_gpio *bank;
@@ -262,7 +252,6 @@ void gpio_set_value(int gp, int value)
 		bank->clr_data = 1U << GPIO_BIT(gp);
 }
 
-
 void gpio_info(void)
 {
 	int gp, dir, val;
diff --git a/include/linux/mdio.h b/include/linux/mdio.h
index be80f91476..ea20608463 100644
--- a/include/linux/mdio.h
+++ b/include/linux/mdio.h
@@ -127,8 +127,6 @@
 					MDIO_DEVS_DTEXS | \
 					MDIO_DEVS_AN)
 
-
-
 /* Control register 2. */
 #define MDIO_PMA_CTRL2_TYPE		0x000f	/* PMA/PMD type selection */
 #define MDIO_PMA_CTRL2_10GBCX4		0x0000	/* 10GBASE-CX4 type */