summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2022-06-15 12:03:47 -0400
committerTom Rini <trini@konsulko.com>2022-07-05 17:03:01 -0400
commit140f0aa0deb745bad06ffb0c0e21d87424b12ea7 (patch)
treefca7492037e37a82892a17ba7c1cdebedf98537d
parent0285455d905e5e2bc84b73fa6388ce5b1598d88b (diff)
downloadu-boot-140f0aa0deb745bad06ffb0c0e21d87424b12ea7.tar.gz
nxp: Cleanup some emulator related options.
- Drop the emulator CONFIG test from include/configs/ls1088ardb.h - Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in drivers/ddr/fsl/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--README4
-rw-r--r--drivers/ddr/fsl/Kconfig6
-rw-r--r--include/configs/ls1088ardb.h4
3 files changed, 6 insertions, 8 deletions
diff --git a/README b/README
index c1d516beda..0cf1c4991a 100644
--- a/README
+++ b/README
@@ -388,10 +388,6 @@ The following options need to be configured:
CONFIG_SYS_FSL_DDR_ADDR
Freescale DDR memory-mapped register base.
- CONFIG_SYS_FSL_DDR_EMU
- Specify emulator support for DDR. Some DDR features such as
- deskew training are not available.
-
CONFIG_SYS_FSL_DDRC_GEN1
Freescale DDR1 controller.
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index fe69bef3d3..6a29b23bab 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -10,6 +10,12 @@ config SYS_FSL_MMDC
help
Select Freescale Multi Mode DDR controller (MMDC).
+config SYS_FSL_DDR_EMU
+ bool
+ help
+ Specify emulator support for DDR. Some DDR features such as deskew
+ training are not available.
+
if SYS_FSL_DDR || SYS_FSL_MMDC
config SYS_FSL_DDR_BE
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index c69003018b..aeadf534bc 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -15,11 +15,7 @@
#define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */
-#ifdef CONFIG_EMU
-#define CONFIG_SYS_FSL_DDR_EMU
-#else
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
-#endif
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */