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author | Alex Marginean <alexm.osslist@gmail.com> | 2019-06-07 11:24:22 +0300 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2019-07-10 16:52:58 -0600 |
commit | 2204bc1bd3abedc37a72282b4ddcfb3eca8cfccb (patch) | |
tree | b5ff9fd7c21bb5c7084d7e57c08608c9dbdd23b8 | |
parent | da0fb5fdd430abef136bc5e1636f8d1855cf0008 (diff) | |
download | u-boot-2204bc1bd3abedc37a72282b4ddcfb3eca8cfccb.tar.gz |
pci: fixed dm_pci_map_bar comment
The comment now indicates that the input argument bar is a register offset,
not a BAR index.
It also mentions which BARs are supported for type 0/1 and that the
function can return 0 on error.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r-- | include/pci.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/include/pci.h b/include/pci.h index 508f7bca81..40c7751acf 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1309,12 +1309,14 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, * dm_pci_map_bar() - get a virtual address associated with a BAR region * * Looks up a base address register and finds the physical memory address - * that corresponds to it + * that corresponds to it. + * Can be used for 32b BARs 0-5 on type 0 functions and for 32b BARs 0-1 on + * type 1 functions. * * @dev: Device to check - * @bar: Bar number to read (numbered from 0) + * @bar: Bar register offset (PCI_BASE_ADDRESS_...) * @flags: Flags for the region type (PCI_REGION_...) - * @return: pointer to the virtual address to use + * @return: pointer to the virtual address to use or 0 on error */ void *dm_pci_map_bar(struct udevice *dev, int bar, int flags); |